Yuqi Wang

Orcid: 0000-0002-4850-5126

Affiliations:

ShanghaiTech University, Shanghai, China

According to our database¹, Yuqi Wang authored at least 6 papers between 2020 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of three.

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Bibliography

2023

A Reliable and High-Speed 6T Compute-SRAM Design With Dual-Split-V<sub>DD</sub> Assist and Bitline Leakage Compensation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., May, 2023

A 40nm 0.35V 25MHz Half-Select Disturb-Free Bitinterleaving 10T SRAM With Data-Aware Write-Path.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

2021

Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Analysis and Optimization Strategies Toward Reliable and High-Speed 6T Compute SRAM.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020

Energy-Efficient Arbitrary Precision Multi-Bit Multiplication with Bi-Serial In/Near Memory Computing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Yuqi Wang

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