Yung-Chow Peng
According to our database1,
Yung-Chow Peng
authored at least 9 papers
between 1994 and 2024.
Collaborative distances:
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Bibliography
2024
Current Mirrors with Tapered Stacked-Gates for Area Saving or Noise Improvement in 3nm FinFET Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
3.8 A 0.65V 900µm² BEoL RC-Based Temperature Sensor with ±1°C Inaccuracy from -25°C to 125°C.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2019
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2014
A 0.7V resistive sensor with temperature/voltage detection function in 16nm FinFET technologies.
Proceedings of the Symposium on VLSI Circuits, 2014
An ultra-compact, untrimmed CMOS bandgap reference with 3σ inaccuracy of +0.64% in 16nm FinFET.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2012
An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter.
IEEE J. Solid State Circuits, 2012
2011
55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994