Yuncheng Zhang

According to our database, Yuncheng Zhang authored at least 31 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter.

Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, April, 2024

Design of Synthesizable Digital Phase Locked Loops.

Yuncheng Zhang, Kenichi Okada

IPSJ Trans. Syst. LSI Des. Methodol., 2024

A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond.

Yi Zhang, Minzhe Tang, Jian Pang, Zheng Li, Dongfan Xu, Dingxin Xu, Yuncheng Zhang, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter.

Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS.

Chun Wang, Hans Herdian, Wenbin Zheng, Chenxin Liu, Jill C. Mayeda, Yuxuan Liu, Olivia Angel Yong, Wenqian Wang, Yuncheng Zhang, Carrel da Gomez, Abanob Shehata, Sena Kato, Ibrahim Abdo, Teruo Jyo, Hiroshi Hamada, Hiroyuki Takahashi, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations.

Xi Fu, Dongwon You, Xiaolin Wang, Yun Wang, Carolyn Jill Mayeda, Yuan Gao, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashbir Aviat Fadila, Zheng Li, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane

IEEE J. Solid State Circuits, December, 2023

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter.

Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler.

Dongwon You, Xi Fu, Xiaolin Wang, Yuan Gao, Wenqian Wang, Jun Sakamaki, Hans Herdian, Sena Kato, Michihiro Ide, Yuncheng Zhang, Ashbir Aviat Fadila, Zheng Li, Chun Wang, Yun Wang, Jumpei Sudo, Makoto Higaki, Nahoka Kawaguchi, Masaya Nitta, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration.

Junjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang, Ashbir Aviat Fadila, Zezheng Liu, Waleed Madany, Yuang Xiong, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation.

Xi Fu, Dongwon You, Xiaolin Wang, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashbir Aviat Fadila, Zheng Li, Yun Wang, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path.

Waleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Atsushi Shirane, Kenichi Okada

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference.

Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

An Ultrasonic Reverse Time Migration Imaging Method Based on Higher-Order Singular Value Decomposition.

Yuncheng Zhang, Xiang Gao, Jiawei Zhang, Jingpin Jiao

Sensors, 2022

A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal.

Yun Wang, Dongwon You, Xi Fu, Takeshi Nakamura, Ashbir Aviat Fadila, Teruki Someya, Atsuhiro Kawaguchi, Junjun Qiu, Jian Pang, Kiyoshi Yanagisawa, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu, Shunichiro Masaki, Daisuke Yamazaki, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, 2022

A 0.37mm² Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components.

Yuncheng Zhang, Bangan Liu, Teruki Someya, Rui Wu, Junjun Qiu, Atsushi Shirane, Kenichi Okada

IEICE Trans. Electron., 2022

A low-power digital baseband circuit for GMSK demodulation in sub-GHz application.

Junjun Qiu, Bangan Liu, Yuncheng Zhang, Atsushi Shirane, Kenichi Okada

IEICE Electron. Express, 2022

NTIRE 2022 Challenge on Efficient Super-Resolution: Methods and Results.

Yawei Li, Kai Zhang, Radu Timofte, Luc Van Gool, Fangyuan Kong, Mingxi Li, Songwei Liu, Zongcai Du, Ding Liu, Chenhui Zhou, Jingyi Chen, Qingrui Han, Zheyuan Li, Yingqi Liu, Xiangyu Chen, Haoming Cai, Yu Qiao, Chao Dong, Long Sun, Jinshan Pan, Yi Zhu, Zhikai Zong, Xiaoxiao Liu, Zheng Hui, Tao Yang, Peiran Ren, Xuansong Xie, Xian-Sheng Hua, Yanbo Wang, Xiaozhong Ji, Chuming Lin, Donghao Luo, Ying Tai, Chengjie Wang, Zhizhong Zhang, Yuan Xie, Shen Cheng, Ziwei Luo, Lei Yu, Zhihong Wen, Qi Wu, Youwei Li, Haoqiang Fan, Jian Sun, Shuaicheng Liu, Yuanfei Huang, Meiguang Jin, Hua Huang, Jing Liu, Xinjian Zhang, Yan Wang, Lingshun Long, Gen Li, Yuanfan Zhang, Zuowei Cao, Lei Sun, Panaetov Alexander, Yucong Wang, Minjie Cai, Li Wang, Lu Tian, Zheyuan Wang, Hongbing Ma, Jie Liu, Chao Chen, Yidong Cai, Jie Tang, Gangshan Wu, Weiran Wang, Shirui Huang, Honglei Lu, Huan Liu, Keyan Wang, Jun Chen, Shi Chen, Yuchun Miao, Zimo Huang, Lefei Zhang, Mustafa Ayazoglu, Wei Xiong, Chengyi Xiong, Fei Wang, Hao Li, Ruimian Wen, Zhijing Yang, Wenbin Zou, Weixin Zheng, Tian Ye, Yuncheng Zhang, Xiangzhen Kong, Aditya Arora, Syed Waqas Zamir, Salman H. Khan, Munawar Hayat, Fahad Shahbaz Khan, Dandan Gao, Dengwen Zhou, Qian Ning, Jingzhu Tang, Han Huang, Yufei Wang, Zhangheng Peng, Haobo Li, Wenxue Guan, Shenghua Gong, Xin Li, Jun Liu, Wanjun Wang, Kun Zeng, Hanjiang Lin, Xinyu Chen, Jinsheng Fang

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022

2021

A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration.

Bangan Liu, Yuncheng Zhang, Junjun Qiu, Huy Cu Ngo, Wei Deng, Kengo Nakata, Toru Yoshioka, Jun Emmei, Jian Pang, Aravind Tharayil Narayanan, Haosheng Zhang, Teruki Someya, Atsushi Shirane, Kenichi Okada

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth.

Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Jian Pang, Hanli Liu, Masaya Miyahara, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, 2021

A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems.

Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, 2021

A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation.

Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Weichu Chen, Yun Wang, Dongwon You, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth.

Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 0.25 mm² BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration.

Zheng Sun, Dingxin Xu, Junjun Qiu, Zezheng Liu, Yuncheng Zhang, Hongye Huang, Hanli Liu, Bangan Liu, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada

Proceedings of the 47th ESSCIRC 2021, 2021

A DSM-based Polar Transmitter with 23.8% System Efficiency.

Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Atsushi Shirane, Kenichi Okada

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL.

Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Kiyoshi Yanagisawa, Junjun Qiu, Yun Wang, Jian Pang, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019

An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration.

Bangan Liu, Yuncheng Zhang, Junjun Qiu, Wei Deng, Zule Xu, Haosheng Zhang, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018

Synergetic governing controller design for the hydraulic turbine governing system with complex conduit system.

Jianzhong Zhou, Yuncheng Zhang, Yang Zheng, Yanhe Xu

J. Frankl. Inst., 2018

A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique.

Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Haosheng Zhang, Jian Pang, Aravind Tharayil Narayanan, Dongsheng Yang, Hanli Liu, Kenichi Okada, Akira Matsuzawa

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

A parameter adaptive identification method for a pumped storage hydro unit regulation system model using an improved gravitational search algorithm.

Yanhe Xu, Jianzhong Zhou, Chu Zhang, Yuncheng Zhang, Chaoshun Li, Zhongdong Qian

Simul., 2017

2015

A Multibit Delta-Sigma Modulator With Double Noise-Shaped Segmentation.

Lin He, Guanglong Zhu, Fang Long, Yuncheng Zhang, Li Wang, Fujiang Lin, Libin Yao, Xicheng Jiang

IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014

Digital Noise-Coupling Technique for Delta-Sigma Modulators With Segmented Quantization.

Lin He, Yuncheng Zhang, Fang Long, Fengcheng Mei, Mingyuan Yu, Fujiang Lin, Libin Yao, Xicheng Jiang

IEEE Trans. Circuits Syst. II Express Briefs, 2014