Yulin Tan

According to our database, Yulin Tan authored at least 8 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

CIS-Net: An End-to-end Chromosome Instance Segmentation Method Based on Disturbance Features Deactivation and Strengthened Disparity.

Yulin Tan, Xing Wu, Chengliang Wang, Zailin Yang, Longrong Ran, Yao Liu

Proceedings of the International Joint Conference on Neural Networks, 2024

2019

Low-cost and High-accuracy LIDAR SLAM for Large Outdoor Scenarios.

Chenglin Pang, Yulin Tan, Shangcong Li, Yanli Li, Bing Ji, Rui Song

Proceedings of the 2019 IEEE International Conference on Real-time Computing and Robotics, 2019

2017

13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications.

Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Luis Cuellar, Muhammad Faisal, Yee William Li, Hyung Seok Kim, Khoa Minh Nguyen, Yulin Tan, Brent R. Carlton, Vaibhav A. Vaidya, Yanjie Wang, Thomas Tetzlaff, Satoshi Suzuki, Amr Fahim, Parmoon Seddighrad, Jianyong Xie, Zhichao Zhang, Divya Shree Vemparala, Ashoke Ravi, Stefano Pellerano, Yorgos Palaskas

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2013

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath

IEEE J. Solid State Circuits, 2013

2012

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.

Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala

Proceedings of the Symposium on VLSI Circuits, 2012

32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.

Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A flip-chip-packaged 1.8V 28dBm class-AB power amplifier with shielded concentric transformers in 32nm SoC CMOS.

Yulin Tan, Hongtao Xu, Mohammed A. El-Tanani, Stewart S. Taylor, Hasnain Lakdawala

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

A 10 GHz low phase noise VCO employing current reuse and capacitive power combining.

Diptendu Ghosh, Stewart S. Taylor, Yulin Tan, Ranjit Gharpurey

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010