Yukio Akazawa

According to our database1, Yukio Akazawa authored at least 9 papers between 1988 and 1998.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

1988
1990
1992
1994
1996
1998
0
1
2
3
1
1
2
1
2
2

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1998
A 156-Mb/s CMOS optical receiver for burst-mode transmission.
IEEE J. Solid State Circuits, 1998

1995
3.5-Gb/s⨉4-ch Si bipolar LSI's for optical interconnections.
IEEE J. Solid State Circuits, December, 1995

1994
A design technique for a 60 GHz-bandwidth distributed baseband amplifier IC module.
IEEE J. Solid State Circuits, December, 1994

A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold technique.
IEEE J. Solid State Circuits, December, 1994

1993
Circuits to reduce distortion in the diode-bridge track-and-hold.
IEEE J. Solid State Circuits, March, 1993

1990
A low-power wide-band amplifier using a new parasitic capacitance compensation technique.
IEEE J. Solid State Circuits, February, 1990

Jitter analysis of high-speed sampling systems.
IEEE J. Solid State Circuits, February, 1990

1988
Si bipolar 2-GHz 6-bit flash A/D conversion LSI.
IEEE J. Solid State Circuits, December, 1988

An 8-bit 2-ns monolithic DAC.
IEEE J. Solid State Circuits, February, 1988


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