Yukihiro Urakawa

According to our database, Yukihiro Urakawa authored at least 3 papers between 1989 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Scaling-up Memristor Monte Carlo with magnetic domain-wall physics.

Thomas Dalgaty, Shogo Yamada, Anca Molnos, Eiji Kawasaki, Thomas Mesquida, François Rummens, Tatsuo Shibata, Yukihiro Urakawa, Yukio Terasaki, Tomoyuki Sasaki, Marc Duranton

CoRR, 2023

1999

A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder.

Masakazu Suzuoki, Ken Kutaragi, Toshiyuki Hiroi, Hidetaka Magoshi, Shin'ichi Okamoto, Masaaki Oka, Akio Ohba, Yasuyuki Yamamoto, Makoto Furuhashi, Masayoshi Tanaka, Teiji Yutaka, Toyoshi Okada, Masato Nagamatsu, Yukihiro Urakawa, Masami Funyu, Atsushi Kunimatsu, Harutaka Goto, Kazuhiro Hashimoto, Nobuhiro Ide, Hiroaki Murakami, Yukio Ohtaguro, Akira Aono

IEEE J. Solid State Circuits, 1999

1989

An 8-ns 1-Mbit ECL BiCMOS SRAM with double-latch ECL-to-CMOS-level converters.

Masataka Matsui, Hiroshi Momose, Yukihiro Urakawa, Takeo Maeda, Azuma Suzuki, Nobuaki Urakawa, Katsuhiko Sato, Jun'ichi Matsunaga, Kiyofumi Ochii

IEEE J. Solid State Circuits, October, 1989