Yuji Yokoyama

According to our database1, Yuji Yokoyama authored at least 4 papers between 1991 and 2001.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2001
A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%.
IEEE J. Solid State Circuits, 2001

2000
A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory cell efficiency of 33%.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998
A 1-Gb SDRAM with ground-level precharged bit line and nonboosted 2.1-V word line.
IEEE J. Solid State Circuits, 1998

1991
A 6-ns 256-kb BiCMOS TTL SRAM.
IEEE J. Solid State Circuits, March, 1991


  Loading...