Yuji Yokoyama

According to our database, Yuji Yokoyama authored at least 3 papers between 1998 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2001

A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%.

Yuji Yokoyama, Nobutaka Itoh, Masatoshi Hasegawa, Masahiro Katayama, Hiroshi Akasaki, Masayuki Kaneda, Toshitsugu Ueda, Yousuke Tanaka, Eiji Yamasaki, Masaya Todokoro, Keinosuke Toriyama, Hiroshi Miki, Masayoshi Yagyu, Kazumasa Takashima, Toru Kobayashi, Syuichi Miyaoka, Nobuo Tamba

IEEE J. Solid State Circuits, 2001

2000

A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory cell efficiency of 33%.

Yuji Yokoyama, Nybutaka Itoh, Masap Katayama, Kazumasa Takashima, Hiroshi Akasaki, Masayuki Kaneda, Toshitsugu Ueda, Yousuke Tanaka, Eiji Yamasaki, Masaya Todokoro, Keinosuke Toriyama, Hiroshi Miki, Masayoshi Yagyu, Tom Kobayashi, Syuichi Miyaoka, Nobuo Tamba

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998

A 1-Gb SDRAM with ground-level precharged bit line and nonboosted 2.1-V word line.

Satoshi Eto, Masato Matsumiya, Masato Takita, Yuki Ishii, Toshikazu Nakamura, Kuninori Kawabata, Hideki Kano, Ayako Kitamoto, Toshimi Ikeda, Toru Koga, Mitsuhiro Higashiho, Yuji Serizawa, Kazuo Itabashi, Osamu Tsuboi, Yuji Yokoyama, Masao Taguchi

IEEE J. Solid State Circuits, 1998