Yuji Yano
According to our database1,
Yuji Yano
authored at least 27 papers
between 2003 and 2022.
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Bibliography
2022
28-m W Fully Embedded AI Techniques with On-site Learning for Low-Power Handy Tactile Sensing System.
Proceedings of the 2022 International Symposium on VLSI Design, Automation and Test, 2022
2020
Heartbeat Interval Error Compensation Method for Low Sampling Rates Photoplethysmography Sensors.
IEICE Trans. Commun., 2020
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Low-Noise Photoplethysmography Sensor Using Correlated Double Sampling for Heartbeat Interval Acquisition.
IEEE Trans. Biomed. Circuits Syst., 2019
A Low-Power Photoplethysmography Sensor using Correlated Double Sampling and Reference Readout Circuit.
Proceedings of the 2019 IEEE SENSORS, Montreal, QC, Canada, October 27-30, 2019, 2019
A Heartbeat Interval Error Compensation Method Using Multiple Linear Regression for Photoplethysmography Sensors.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
Hardware Implementation of Autoregressive Model Estimation Using Burg's Method for Low-Energy Spectral Analysis.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 5-ms Error, 22-μA Photoplethysmography Sensor using Current Integration Circuit and Correlated Double Sampling.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
2016
Demonstration of 100 Gbps optical packet switching using header processor based on 48-bit longest prefix matching.
Photonic Netw. Commun., 2016
A large scale access-control list for IoT security comprising embedded IP-core and DDR DRAM.
Proceedings of the International SoC Design Conference, 2016
Energy-efficient high-speed search engine using a multi-dimensional TCAM architecture with parallel pipelined subdivided structure.
Proceedings of the 13th IEEE Annual Consumer Communications & Networking Conference, 2016
2014
Proceedings of the IEEE International Conference on Fuzzy Systems, 2014
2013
ACM SIGOPS Oper. Syst. Rev., 2013
A 250-MHz 18-Mb Full Ternary CAM With Low-Voltage Matchline Sensing Scheme in 65-nm CMOS.
IEEE J. Solid State Circuits, 2013
IEICE Trans. Electron., 2013
IEICE Trans. Commun., 2013
J. Electron. Test., 2013
2D Sliced Packet Buffer with traffic volume and buffer occupancy adaptation for power saving.
Proceedings of the 10th IEEE Consumer Communications and Networking Conference, 2013
2012
Proceedings of the 13th IEEE International Conference on High Performance Switching and Routing, 2012
A 200Msps, 0.6W eDRAM-based search engine applying full-route capacity dedicated FIB application.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE 26th International Conference on Advanced Information Networking and Applications, 2012
2004
Associative memory with fully parallel nearest-Manhattan-distance search for low-power real-time single-chip applications.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
A nearest-hamming-distance search memory with fully parallel mixed digital-analog match circuitry.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003