Yuji Kukimoto

According to our database, Yuji Kukimoto authored at least 17 papers between 1990 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Calibration-Based Differentiable Timing Optimization in Non-linear Global Placement.

Wuxi Li, Yuji Kukimoto, Grégory Servel, Ismail Bustany, Mehrdad E. Dehkordi

Proceedings of the 2024 International Symposium on Physical Design, 2024

2002

On convergence of switching windows computation in presence of crosstalk noise.

Pinhong Chen, Yuji Kukimoto, Chin-Chi Teng, Kurt Keutzer

Proceedings of 2002 International Symposium on Physical Design, 2002

Refining switching window by time slots for crosstalk noise calculation.

Pinhong Chen, Yuji Kukimoto, Kurt Keutzer

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

1999

Timing-safe false path removal for combinational modules.

Yuji Kukimoto, Robert K. Brayton

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Combinational Verification based on High-Level Functional Specifications.

Evguenii I. Goldberg, Yuji Kukimoto, Robert K. Brayton

Proceedings of the 1998 Design, 1998

Delay-Optimal Technology Mapping by DAG Covering.

Yuji Kukimoto, Robert K. Brayton, Prashant Sawkar

Proceedings of the 35th Conference on Design Automation, 1998

Hierarchical Functional Timing Analysis.

Yuji Kukimoto, Robert K. Brayton

Proceedings of the 35th Conference on Design Automation, 1998

1997

Approximate timing analysis of combinational circuits under the XBD0 model.

Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, Robert K. Brayton

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Exact Required Time Analysis via False Path Detection.

Yuji Kukimoto, Robert K. Brayton

Proceedings of the 34st Conference on Design Automation, 1997

1996

VIS.

Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa

Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

VIS: A System for Verification and Synthesis.

Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa

Proceedings of the Computer Aided Verification, 8th International Conference, 1996

1994

A redesign technique for combinational circuits based on gate reconnections.

Yuji Kukimoto, Masahiro Fujita, Robert K. Brayton

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1992

Rectification method for lookup-table type FPGA's.

Yuji Kukimoto, Masahiro Fujita

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Patching Method for Lookup-Table Type FPLs.

Masahiro Fujita, Yuji Kukimoto

Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

1991

Application of Boolean Unification to Combinational Logic Synthesis.

Masahiro Fujita, Yutaka Tamiya, Yuji Kukimoto, Kuang-Chien Chen

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990

Practical design assistance at register transfer level using a data path verifier.

Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.

Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka

Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990