Yuji Ichikawa

According to our database, Yuji Ichikawa authored at least 3 papers between 1998 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Evaluation of low-energy and high-performance processor using variable stages pipeline technique.

Takahiro Sasaki, Yuji Ichikawa, Tetsuo Hironaka, Toshiaki Kitamura, Toshio Kondo

IET Comput. Digit. Tech., 2008

1998

Evaluation of a Low-Power Reconfigurable DSP Architecture.

Arthur Abnous, Katsunori Seno, Yuji Ichikawa, Marlene Wan, Jan M. Rabaey

Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

An energy conscious methodology for early design exploration of heterogeneous DSPs.

Marlene Wan, Yuji Ichikawa, David Lidsky, Jan M. Rabaey

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998