Yuichiro Yamaji

According to our database, Yuichiro Yamaji authored at least 6 papers between 2010 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

FPGA Blokus Duo Solver using a massively parallel architecture.

Takashi Yoza, Retsu Moriwaki, Yuki Torigai, Yuki Kamikubo, Takayuki Kubota, Takahiro Watanabe, Takumi Fujimori, Hiroyuki Ito, Masato Seo, Kouta Akagi, Yuichiro Yamaji, Minoru Watanabe

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Four-configuration-context optically reconfigurable gate array with a MEMS interleaving method.

Yuichiro Yamaji, Minoru Watanabe

Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2011

A 144-configuration context MEMS optically reconfigurable gate array.

Yuichiro Yamaji, Minoru Watanabe

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

An FPGA Connect6 Solver with a two-stage pipelined evaluation.

Takahiro Watanabe, Retsu Moriwaki, Yuichiro Yamaji, Yuki Kamikubo, Yuki Torigai, Yuki Nihira, Takashi Yoza, Yumiko Ueno, Yuji Aoyama, Minoru Watanabe

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010

A 64-context MEMS optically reconfigurable gate array.

Yuichiro Yamaji, Minoru Watanabe

Proceedings of the International Conference on Field-Programmable Technology, 2010

Othello Solver based on a soft-core MIMD processor array.

Takayuki Mabuchi, Takahiro Watanabe, Retsu Moriwaki, Yuji Aoyama, Amarjargal Gundjalam, Yuichiro Yamaji, Hironari Nakada, Minoru Watanabe

Proceedings of the International Conference on Field-Programmable Technology, 2010