Yuichiro Mitani
Orcid: 0000-0001-6448-7100
According to our database1,
Yuichiro Mitani
authored at least 11 papers
between 2012 and 2025.
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Bibliography
2025
Re-Consideration of Correlation Between Interface States and Bulk Traps Using Cryogenic Measurement.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2024
Re-consideration of Correlation between Interface and Bulk Trap Generations using Cryogenic Measurement.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2020
Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine Incorporation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2018
Proceedings of the IEEE International Reliability Physics Symposium, 2018
2017
Error Tolerance Analysis of Deep Learning Hardware Using a Restricted Boltzmann Machine Toward Low-Power Memory Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Mechanism of gate dielectric degradation by hydrogen migration from the cathode interface.
Microelectron. Reliab., 2017
Physically unclonable function using initial waveform of ring oscillators on 65 nm CMOS technology.
CoRR, 2017
2015
Simple technique for prediction of breakdown voltage of ultrathin gate insulator under ESD testing.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
2013
Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing.
Microelectron. Reliab., 2013
Improvement of gate disturb degradation in SONOS FETs for Vth mismatch compensation in CMOS analog circuits.
Proceedings of 2013 International Conference on IC Design & Technology, 2013
2012
Lifetime prediction of channel hot carrier degradation in pMOSFETs separating NBTI component.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012