Yuichi Sekiya
According to our database1,
Yuichi Sekiya
authored at least 2 papers
between 2020 and 2021.
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Bibliography
2021
The Fractional-N All Digital Frequency Locked Loop with Robustness for PVT Variation and Its Application for the Microcontroller Unit.
IEICE Trans. Inf. Syst., 2021
2020
Novel Fractional-N All Digital Frequency Locked Loop with Robustness for PVT variation.
Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020