Yuh-Fang Tsai

According to our database, Yuh-Fang Tsai authored at least 13 papers between 2001 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Design Space Exploration for 3-D Cache.

Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin

IEEE Trans. Very Large Scale Integr. Syst., 2008

2006

Reducing dynamic and leakage energy in VLIW architectures.

Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin

ACM Trans. Embed. Comput. Syst., 2006

2005

Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty.

Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Three-Dimensional Cache Design Exploration Using 3DCacti.

Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Leakage-Aware Interconnect for On-Chip Network.

Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin

Proceedings of the 2005 Design, 2005

2004

Characterization and modeling of run-time techniques for leakage power reduction.

Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin

IEEE Trans. Very Large Scale Integr. Syst., 2004

ChipPower: an architecture-level leakage simulator.

Yuh-Fang Tsai, Ananth Hegde Ankadi, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Reducing leakage energy in FPGAs using region-constrained placement.

Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003

Managing Leakage Energy in Cache Hierarchies.

Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam

J. Instr. Level Parallelism, 2003

Implications of technology scaling on leakage reduction techniques.

Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 40th Design Automation Conference, 2003

2002

Evaluating Run-Time Techniques for Leakage Power Reduction.

David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Leakage Energy Management in Cache Hierarchies.

Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam

Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

2001

Exploiting VLIW schedule slacks for dynamic and leakage energy reduction.

Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001