Yuetsu Kodama
Orcid: 0000-0001-5787-0363
According to our database1,
Yuetsu Kodama
authored at least 75 papers
between 1989 and 2023.
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Bibliography
2023
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads.
ACM Trans. Archit. Code Optim., December, 2023
Evaluation of Performance and Power Consumption on Supercomputer Fugaku Using SPEC HPC Benchmarks.
IEICE Trans. Electron., June, 2023
2022
At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache.
CoRR, 2022
2021
J. Supercomput., 2021
Performance of the Supercomputer Fugaku for Breadth-First Search in Graph500 Benchmark.
Proceedings of the High Performance Computing - 36th International Conference, 2021
Power/Performance/Area Evaluations for Next-Generation HPC Processors using the A64FX Chip.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2021
Proceedings of the IEEE International Conference on Cluster Computing, 2021
2020
Proceedings of the International Conference for High Performance Computing, 2020
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2020
Proceedings of the IEEE International Conference on Cluster Computing, 2020
Performance Evaluation of Supercomputer Fugaku using Breadth-First Search Benchmark in Graph500.
Proceedings of the IEEE International Conference on Cluster Computing, 2020
Proceedings of the IEEE International Conference on Cluster Computing, 2020
2019
2018
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018
2017
Preliminary Performance Evaluation of Application Kernels Using ARM SVE with Multiple Vector Lengths.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017
2015
Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015
Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015
2014
SIGARCH Comput. Archit. News, 2014
XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters.
Proceedings of the First Workshop on Accelerator Programming using Directives, 2014
A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators.
Proceedings of the Second International Symposium on Computing and Networking, 2014
QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication.
Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014
2013
Imbalance of CPU temperatures in a blade system and its impact for power consumption of fans.
Clust. Comput., 2013
Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the Algorithms and Architectures for Parallel Processing, 2013
Proceedings of the First International Symposium on Computing and Networking, 2013
Proceedings of the IEEE 21st Annual Symposium on High-Performance Interconnects, 2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
2011
IEICE Trans. Commun., 2011
2010
Proceedings of the 2010 11th IEEE/ACM International Conference on Grid Computing, 2010
Power Reduction Scheme of Fans in a Blade System by Considering the Imbalance of CPU Temperatures.
Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010
2009
Proceedings of the 5th International ICST Conference on Testbeds and Research Infrastructures for the Development of Networks and Communities, 2009
2008
The design and implementation of MPI collective operations for clusters in long-and-fast networks.
Clust. Comput., 2008
High Performance Relay Mechanism for MPI Communication Libraries Run on Multiple Private IP Address Clusters.
Proceedings of the 8th IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2008), 2008
2007
Dependable communication using multiple network paths on fast long-distance networks.
Syst. Comput. Jpn., 2007
Proceedings of the 2007 IEEE International Conference on Cluster Computing, 2007
2006
Proceedings of the 2006 IEEE International Conference on Cluster Computing, 2006
2005
Proceedings of the 2005 IEEE International Conference on Cluster Computing (CLUSTER 2005), September 26, 2005
2004
Proceedings of the 2004 Symposium on Applications and the Internet Workshops (SAINT 2004 Workshops), 2004
Proceedings of the 2004 IEEE International Conference on Cluster Computing (CLUSTER 2004), 2004
2003
Proceedings of the 3rd IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2003), 2003
2001
Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture.
Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001
1999
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999
1998
Proceedings of the SIGIR '98: Proceedings of the 21st Annual International ACM SIGIR Conference on Research and Development in Information Retrieval, 1998
Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations.
Proceedings of the 12th international conference on Supercomputing, 1998
Proceedings of the 12th international conference on Supercomputing, 1998
1997
Proceedings of the 9th Annual ACM Symposium on Parallel Algorithms and Architectures, 1997
Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), 1997
1996
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996
1995
Parallel Comput., 1995
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995
Proceedings of the 9th international conference on Supercomputing, 1995
1994
Proceedings of the Theory and Practice of Parallel Programming, 1994
Proceedings of the Sixth IEEE Symposium on Parallel and Distributed Processing, 1994
Proceedings of the Proceedings Supercomputing '94, 1994
Proceedings of the International Symposium on Parallel Architectures, 1994
Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4.
Proceedings of the 8th International Symposium on Parallel Processing, 1994
Proceedings of the Parallel Architectures and Compilation Techniques, 1994
1993
Syst. Comput. Jpn., 1993
Parallel Comput., 1993
Proceedings of the Fifth IEEE Symposium on Parallel and Distributed Processing, 1993
Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation.
Proceedings of the 7th international conference on Supercomputing, 1993
Proceedings of the 7th international conference on Supercomputing, 1993
1992
Parallel Comput., 1992
A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation.
Future Gener. Comput. Syst., 1992
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem.
Proceedings of the International Conference on Fifth Generation Computer Systems. FGCS 1992, 1992
1991
Proceedings of the Proceedings Supercomputing '91, 1991
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991
Design and Implementation of a Versatile Interconnection Network in the EM-4.
Proceedings of the International Conference on Parallel Processing, 1991
1989
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989
An Architectural Disgn of a Highly Parallel Dataflow Machine.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989