Yuequan Liu
According to our database1,
Yuequan Liu
authored at least 5 papers
between 2015 and 2017.
Collaborative distances:
Collaborative distances:
Timeline
2015
2016
2017
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2017
Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process.
Int. J. Circuit Theory Appl., 2017
2016
Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter performance.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Design on multi-bit adder using sense amplifier-based pass transistor logic for near-threshold voltage operation.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015