A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices.

[BibT_eX]

[DOI]

Jianguo Yang

Ruijun Lin

Microelectron. J., 2022

An ACF.

[BibT_eX]

[DOI]

Microelectron. J., 2022

A configurable detection chip with ±0.6% Inaccuracy for liquid conductivity using dual-frequency sinusoidal signal technique in 65 nm CMOS.

[BibT_eX]

[DOI]

Microelectron. J., 2022

A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC.

[BibT_eX]

[DOI]

Microelectron. J., 2022

TVD-PB logic circuit based on camouflaging circuit for IoT security.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2022

A 65nm/0.448 mW EEG processor with parallel architecture SVM and lifting wavelet transform for high-performance and low-power epilepsy detection.

[BibT_eX]

[DOI]

Comput. Biol. Medicine, 2022

2021

A Multimode Configurable Physically Unclonable Function With Bit-Instability-Screening and Power-Gating Strategies.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

SPUF design based on Camellia encryption algorithm.

[BibT_eX]

[DOI]

Microelectron. J., 2021

A 0.004% resolution & SAT.

[BibT_eX]

[DOI]

Integr., 2021

Orthogonal obfuscation based key management for multiple IP protection.

[BibT_eX]

[DOI]

Integr., 2021

A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Reliable Multi-information Entropy Glitch PUF Using Schmitt Trigger Sampling Method for IoT Security.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A String-in-string-out 256 Bits eFuse Using Full-custom Design in 55nm Process.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A HfO2 Ferroelectric Capacitor based 10T2C High Reliability Non-Volatile SRAM for Low Power IoT Applications.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Multi-conductance States Memristor-based CNN Circuit Using Quantization Method for Digital Recognition.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A ReRAM-based 10T2R SRAM Using Power-off Recovery Function for Reducing Power.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020

Radiation-Hardened, Read-Disturbance-Free New-Quatro-10T Memory Cell for Aerospace Applications.

[BibT_eX]

[DOI]

Liang Wen

Yuejun Zhang

Pengjun Wang

IEEE Trans. Very Large Scale Integr. Syst., 2020

A 215-F² Bistable Physically Unclonable Function With an ACF of <0.005 and a Native Bit Instability of 2.05% in 65-nm CMOS Process.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

A Low Cost MST-FSM Obfuscation Method for Hardware IP Protection.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2020

65 nm sub-threshold logic standard cell library using quasi-Schmitt-trigger design scheme and inverse narrow width effect aware sizing.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2020

2019

A 0.1-pJ/b and ACF <0.04 Multiple-Valued PUF for Chip Identification Using Bit-Line Sharing Strategy in 65-nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction.

[BibT_eX]

[DOI]

Liang Wen

Yuejun Zhang

Xiaoyang Zeng

IEEE Trans. Very Large Scale Integr. Syst., 2019

Design of anti-key leakage camouflage gate circuit for reverse engineering based on dummy vias.

[BibT_eX]

[DOI]

Liwei Li

Pengjun Wang

Yuejun Zhang

Microelectron. J., 2019

A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

Design of Crosstalk NAND Gate Circuit Based on Interconnect Coupling Capacitance.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

Design of Aging Detection Sensor Based on Voltage Comparison.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A High-speed Dynamic Domino Full Adder Based on DICG Positive Feedback.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A 96kb, 0.36V, Energy-Efficient 8T-SRAM with Column-Selection and Shared Buffer-Foot Techniques for EEG Processor.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

An Orthogonal Algorithm for Key Management in Hardware Obfuscation.

[BibT_eX]

[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018

An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process.

[BibT_eX]

[DOI]

Microelectron. J., 2018

Design of Delayed Ternary PUF Circuit Based on CNFET.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia-Pacific Conference on Communications, 2018

2017

A multi-port low-power current mode PUF using MOSFET current-division deviation in 65 nm technology.

[BibT_eX]

[DOI]

Microelectron. J., 2017

A highly reliable lightweight PUF circuit with temperature and voltage compensated for secure chip identification.

[BibT_eX]

[DOI]

Gang Li

Pengjun Wang

Yuejun Zhang

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Design of ternary pulsed reversible counter based on CNFET.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

DSD: A Dynamic State-Deflection Method for Gate-Level Netlist Obfuscation.

[BibT_eX]

[DOI]

Jaya Dofe

Yuejun Zhang

Qiaoyan Yu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Design and Analysis of Highly Energy/Area-Efficient Multiported Register Files With Read Word-Line Sharing Strategy in 65-nm CMOS Process.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Operating load based real-time rolling grey forecasting for machine health prognosis in dynamic maintenance schedule.

[BibT_eX]

[DOI]

J. Intell. Manuf., 2015

Design of power-up and arbiter hybrid physical unclonable functions in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

An area-efficient dual replica-bitline delay technique for process-variation-tolerant low voltage SRAM sense amplifier timing.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2014

Design of threshold dominant delay Physical Unclonable Functions in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013

Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Highly stable data SRAM-PUF in 65nm CMOS process.

[BibT_eX]

[DOI]

Xuelong Zhang

Pengjun Wang

Yuejun Zhang

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

Design of a high information-density multiple valued 2-read 1-write register file.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2012

A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2012

2011

Design of resistant DPA three-valued counter based on SABL.

[BibT_eX]

[DOI]

Yuejun Zhang

Pengjun Wang

Lipeng Hao

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2008

An Implementation of the Agency Architecture in Educational Robotics.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International Conference on Advanced Learning Technologies, 2008

2007

Pedagogical Agents for Teacher Intervention in Educational Robotics Classes: Implementation Issues.

[BibT_eX]

[DOI]

Proceedings of the DIGITEL 2007, 2007

2006

Implementation of Intelligent Agents with Mobility in Educational Robotics Settings.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Workshop on Wireless and Mobile Technologies in Education, 2006

Using Agents for Enhancing Learning Effects in an Advanced Discussion Forum.

[BibT_eX]

[DOI]

Proceedings of the Learning by Effective Utilization of Technologies: Facilitating Intercultural Understanding, 2006

Agency Architecture for Teacher Intervention in Robotics Classes.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Advanced Learning Technologies, 2006

2005

An Open-ended Framework for Learning Object Metadata Interchange.

[BibT_eX]

Yuejun Zhang

Kinshuk

Taiyu Lin

Proceedings of the Towards Sustainable and Scalable Educational Innovations Informed by the Learning Sciences, 2005

Yuejun Zhang

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