Yue-Tsang Chen

According to our database1, Yue-Tsang Chen authored at least 12 papers between 1996 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2001
Intrinsic response for analog module testing using an analog testability bus.
ACM Trans. Design Autom. Electr. Syst., 2001

Test Waveform Shaping in Mixed Signal Test Bus by Pre-Equalization.
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

2000
Intrinsic response extraction for the removal of the parasiticeffects in analog test buses.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Impulse Response Fault Model and Fault Extraction for Functional Level Analog Circuit Diagnosis.
J. Inf. Sci. Eng., 2000

Crosstalk Effect Removal for Analog Measurement in Analog Test Bus.
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses.
Proceedings of the 2000 Design, 2000

1999
Analog Metrology and Stimulus Selection in a Noisy Environment.
Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1998
Boundary scan BIST methodology for reconfigurable systems.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Analog Module Metrology Using MNABST-1 P1149.4 Test Chip.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997
Parasitic Effect Removal for Analog Measurement in P1149.4 Environment.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Analog signal metrology for mixed signal ICs.
Proceedings of the 6th Asian Test Symposium (ATS '97), 17-18 November 1997, 1997

1996
Metrology for analog module testing using analog testability bus.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996


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