Yue-Fang Kuo

Orcid: 0000-0002-4749-8374

According to our database1, Yue-Fang Kuo authored at least 14 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Low-Power Optimization Design of 20-bit Digital Shift Register for Phase-Locked Loop Applications.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024

A 6GHz Sub-Sampling Phase-Locked Loop Using a Lock Detector Controller.
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024

2023
An Efficient Architecture Design of High-Speed Dual-Modulus Prescaler for Frequency Synthesizers.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

Dual-Band Local Oscillator with Adjustable Independent Outputs for 5G/WiFi Applications.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

2022
A Design of 12.8-Gpixels/s Hardware-Efficient Lossless Embedded Compression Engine for Video Coding Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Low-Power 14GHz LC-VCO in 180nm CMOS Technology.
Proceedings of the 5th IEEE International Conference on Knowledge Innovation and Invention, 2022

Low-Power Optimization Design of CMOS Phase-Locked Loop for WiFi-6E Applications.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

2019
A Low Phase Noise Variation Voltage-Controlled Oscillator with a Full Wilson Current Mirror.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

2018
The Design of DC-DC Converter With an Automatic Dual-mode Switching Controller.
Proceedings of the IEEE 7th Global Conference on Consumer Electronics, 2018

2017
Phase noise analysis of 28GHz phase-locked oscillator for next generation 5G system.
Proceedings of the IEEE 6th Global Conference on Consumer Electronics, 2017

2015
A low noise CMOS subharmonic mixer for LTE-A applications.
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

2014
A broadband low voltage CMOS low noise amplifier design.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

2009
5 GHz low power frequency synthesiser with dual-modulus counter.
IET Circuits Devices Syst., 2009

2006
A 5.4-GHz Low-Power Swallow-Conterless Frequency Synthesizer with a Nonliear PFD.
Proceedings of the IFIP VLSI-SoC 2006, 2006


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