Yuchao Yang
Orcid: 0000-0003-4674-4059Affiliations:
- Peking University, Institute for Artificial Intelligence, Beijing, China
According to our database1,
Yuchao Yang
authored at least 32 papers
between 2017 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on yuchaolab.cn
On csauthors.net:
Bibliography
2024
Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.
IEEE J. Solid State Circuits, February, 2024
AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology.
CoRR, 2024
MeMCISA: Memristor-Enabled Memory-Centric Instruction-Set Architecture for Database Workloads.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
2023
Sci. China Inf. Sci., October, 2023
Neuromorphic Artificial Vision Systems Based on Reconfigurable Ion-Modulated Memtransistors.
Adv. Intell. Syst., August, 2023
COPPER: a combinatorial optimization problem solver with processing-in-memory architecture.
Frontiers Inf. Technol. Electron. Eng., May, 2023
Hadamard product-based in-memory computing design for floating point neural network training.
Neuromorph. Comput. Eng., March, 2023
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
Neuromorph. Comput. Eng., December, 2022
VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Neuromorph. Comput. Eng., 2022
Spike-Enabled Audio Learning in Multilevel Synaptic Memristor Array-Based Spiking Neural Network.
Adv. Intell. Syst., 2022
Artificial Multisensory Neurons with Fused Haptic and Temperature Perception for Multimodal In-Sensor Computing.
Adv. Intell. Syst., 2022
A 1.041-Mb/mm<sup>2</sup> 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
NAS4RRAM: neural network architecture search for inference on RRAM-based accelerators.
Sci. China Inf. Sci., 2021
Sci. China Inf. Sci., 2021
2020
Sci. China Inf. Sci., 2020
Memristor-Based Biologically Plausible Memory Based on Discrete and Continuous Attractor Networks for Neuromorphic Systems.
Adv. Intell. Syst., 2020
2019
Investigation of NbO<sub><i>x</i></sub>-based volatile switching device with self-rectifying characteristics.
Sci. China Inf. Sci., 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the Handbook of Memristor Networks., 2019
2018
Integration of biocompatible organic resistive memory and photoresistor for wearable image sensing application.
Sci. China Inf. Sci., 2018
2017
A neural network circuit with associative learning and forgetting process based on memristor neuromorphic device.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017