Yuanzhong Wan

According to our database, Yuanzhong Wan authored at least 2 papers in 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

Optimization of Mixed Logic Circuits with Application to a 64-Bit Static Adder.

Yuanzhong Wan, Maitham Shams

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Delay modeling of CMOS/CPL logic circuits.

Yuanzhong Wan, Maitham Shams

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005