Yuanyong Luo

Orcid: 0000-0002-4450-066X

According to our database1, Yuanyong Luo authored at least 20 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Ascend HiFloat8 Format for Deep Learning.
CoRR, 2024

An Optimized Architecture for Computing the Square Root of Complex Numbers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2022
High-Throughput Low-Latency Pipelined Divider for Single-Precision Floating-Point Numbers.
IEEE Trans. Very Large Scale Integr. Syst., 2022

ML-PLAC: Multiplierless Piecewise Linear Approximation for Nonlinear Function Evaluation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An optimized hardware implementation of the CORDIC algorithm.
IEICE Electron. Express, 2022

Reconfigurable Multifunction Computing Unit Using an Universal Piecewise Linear Method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter.
J. Signal Process. Syst., 2021

PWL-Based Architecture for the Logarithmic Computation of Floating-Point Numbers.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Effective Plug-Ins for Reducing Inference-Latency of Spiking Convolutional Neural Networks During Inference Phase.
Frontiers Comput. Neurosci., 2021

2020
GH CORDIC-Based Architecture for Computing $N$ th Root of Single-Precision Floating-Point Number.
IEEE Trans. Very Large Scale Integr. Syst., 2020

PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A Universal Method of Linear Approximation With Controllable Error for the Efficient Implementation of Transcendental Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

An Optimized Compression Strategy for Compressor-Based Approximate Multiplier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Corrections to "Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base".
IEEE Trans. Very Large Scale Integr. Syst., 2019

Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base.
IEEE Trans. Very Large Scale Integr. Syst., 2019

CLA Formula Aided Fast Architecture Design for Clustered Look-Ahead Pipelined IIR Digital Filter.
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

2018
CORDIC-Based Architecture for Computing Nth Root and Its Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018


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