Yuanwu Lei

According to our database, Yuanwu Lei authored at least 39 papers between 2007 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

MT-3000: a heterogeneous multi-zone processor for HPC.

Kai Lu, Yaohua Wang, Yang Guo, Chun Huang, Sheng Liu, Ruibo Wang, Jianbin Fang, Tao Tang, Zhaoyun Chen, Biwei Liu, Zhong Liu, Yuanwu Lei, Haiyan Sun

CCF Trans. High Perform. Comput., 2022

2021

Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions.

Yaohua Wang, Chen Li, Chang Liu, Sheng Liu, Yuanwu Lei, Jian Zhang, Yang Zhang, Yang Guo

CCF Trans. High Perform. Comput., 2021

2019

Pair-HMM accelerator based on non-cooperative structure.

Pengfei Wang, Yuanwu Lei, Yong Dou

IEICE Electron. Express, 2019

MT-DMA: A DMA Controller Supporting Efficient Matrix Transposition for Digital Signal Processing.

Sheng Ma, Yuanwu Lei, Libo Huang, Zhiying Wang

IEEE Access, 2019

An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators.

Sheng Ma, Libo Huang, Yuanwu Lei, Yang Guo, Zhiying Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Efficient Large-Scale 1D FFT Vectorization on Multi-Core Vector Accelerator.

Zhong Liu, Xi Tian, Xiaowen Chen, Yuanwu Lei, Man Liao

Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

2018

A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition.

Xiaowen Chen, Yuanwu Lei, Zhonghai Lu, Shuming Chen

IEEE Trans. Very Large Scale Integr. Syst., 2018

2017

Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm.

Baozhou Zhu, Yuanwu Lei, Yuanxi Peng, Tingting He

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Platform-Adaptive High-Throughput Surveillance Video Condensation on Heterogeneous Processor Clusters.

Peng Qiao, Teng Li, Yong Dou, Yuanwu Lei, Hongbing Luo, Chi Jin

Proceedings of the Advanced Parallel Processing Technologies, 2017

2016

Classification of Hyperspectral Remote Sensing Image Using Hierarchical Local-Receptive-Field-Based Extreme Learning Machine.

Qi Lv, Xin Niu, Yong Dou, Jiaqing Xu, Yuanwu Lei

IEEE Geosci. Remote. Sens. Lett., 2016

An efficient and effective convolutional auto-encoder extreme learning machine network for 3d feature learning.

Yueqing Wang, Zhige Xie, Kai Xu, Yong Dou, Yuanwu Lei

Neurocomputing, 2016

PR-ELM: Parallel regularized extreme learning machine based on cluster.

Yueqing Wang, Yong Dou, Xinwang Liu, Yuanwu Lei

Neurocomputing, 2016

Multi-bit transient fault control for NoC links using 2D fault coding method.

Xiaowen Chen, Zhonghai Lu, Yuanwu Lei, Yaohua Wang, Shenggang Chen

Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

Single/Double Precision Floating-Point Division and Square Root Unit Based on SRT-8 Algorithm.

Yuanxi Peng, Tingting He, Yuanwu Lei, Baozhou Zhu

Proceedings of the Computer Engineering and Technology - 20th CCF Conference, 2016

2015

A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme.

Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu

IEICE Electron. Express, 2015

An efficient multi-standard QC-LDPC decoder based on the row-layered decoding algorithm.

Song Guo, Yong Dou, Yuanwu Lei, Rongchun Li, Yu Li

IEICE Electron. Express, 2015

Accelerating Molecular Dynamics Simulations on Heterogeneous Architecture.

Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Baofeng Li, Qiang Wang

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUs.

Song Guo, Yong Dou, Yuanwu Lei, Qiang Wang, Fei Xia, Jianning Chen

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

2014

FPGA Implementation of a Special-Purpose VLIW Structure for Double-Precision Elementary Function.

Yuanwu Lei, Lei Guo, Yong Dou, Sheng Ma, Jinbo Xu

ACM Trans. Reconfigurable Technol. Syst., 2014

Transpose-free variable-size FFT accelerator based on-chip SRAM.

Lei Guo, Yuhua Tang, Yuanwu Lei, Yong Dou, Jie Zhou

IEICE Electron. Express, 2014

CPU-GPU hybrid parallel strategy for cosmological simulations.

Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Dan Zou

Concurr. Comput. Pract. Exp., 2014

2013

FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic.

Yuanwu Lei, Yong Dou, Yazhuo Dong, Jie Zhou, Fei Xia

J. Supercomput., 2013

VLIW coprocessor for IEEE-754 quadruple-precision elementary functions.

Yuanwu Lei, Yong Dou, Lei Guo, Jinbo Xu, Jie Zhou, Yazhuo Dong, Hongjian Li

ACM Trans. Archit. Code Optim., 2013

Window Memory Layout Scheme for Alternate Row-Wise/Column-Wise Matrix Access.

Lei Guo, Yuhua Tang, Yong Dou, Yuanwu Lei, Meng Ma, Jie Zhou

IEICE Trans. Inf. Syst., 2013

2012

Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA.

Rongchun Li, Yong Dou, Yuanwu Lei, Shi-Ce Ni, Song Guo

IEICE Trans. Commun., 2012

2011

FPGA-Specific Custom VLIW Architecture for Arbitrary Precision Floating-Point Arithmetic.

Yuanwu Lei, Yong Dou, Jie Zhou

IEICE Trans. Inf. Syst., 2011

Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA.

Yuanwu Lei, Yong Dou, Li Shen, Jie Zhou, Song Guo

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

VPFPAP: A Special-Purpose VLIW Processor for Variable-Precision Floating-Point Arithmetic.

Yuanwu Lei, Yong Dou, Jie Zhou, Sufeng Wang

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

FPGA Implementation of Variable-Precision Floating-Point Arithmetic.

Yuanwu Lei, Yong Dou, Song Guo, Jie Zhou

Proceedings of the Advanced Parallel Processing Technologies - 9th International Symposium, 2011

2010

A Unified Co-Processor Architecture for Matrix Decomposition.

Yong Dou, Jie Zhou, Guiming Wu, Jingfei Jiang, Yuanwu Lei, Shi-Ce Ni

J. Comput. Sci. Technol., 2010

FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing.

Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen

Proceedings of the 24th International Conference on Supercomputing, 2010

2009

FPGA accelerating three QR decomposition algorithms in the unified pipelined framework.

Yong Dou, Jie Zhou, Xiaoyang Chen, Yuanwu Lei, Jinbo Xu

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs.

Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou, Miao Wang, Jingfei Jiang

Proceedings of the FCCM 2009, 2009

A Fine-Grained Pipelined Implementation for Large-Scale Matrix Inversion on FPGA.

Jie Zhou, Yong Dou, Jianxun Zhao, Fei Xia, Yuanwu Lei, Yuxing Tang

Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009

2008

Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA.

Jie Zhou, Yazhuo Dong, Yong Dou, Yuanwu Lei

Proceedings of the International Conference on Embedded Software and Systems, 2008

Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.

Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong

Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008

Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.

Jie Zhou, Yong Dou, Yuanwu Lei, Yazhuo Dong

Proceedings of the Reconfigurable Computing: Architectures, 2008

Area and throughput trade-offs in design of arithmetic encoder for JPEG2000.

Baofeng Li, Yong Dou, Yuanwu Lei

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

FPGA SAR Processor with Window Memory Accesses.

Yong Dou, Jie Zhou, Yuanwu Lei, Xingming Zhou

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007