Yuanwen Huang

Orcid: 0000-0003-4726-1227

According to our database1, Yuanwen Huang authored at least 11 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Vulnerability-aware Dynamic Reconfiguration of Partially Protected Caches.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019
Cache Reconfiguration Using Machine Learning for Vulnerability-aware Energy Optimization.
ACM Trans. Embed. Comput. Syst., 2019

Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Scalable Test Generation for Trojan Detection Using Side Channel Analysis.
IEEE Trans. Inf. Forensics Secur., 2018

An automated configurable Trojan insertion framework for dynamic trust benchmarks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Trace Buffer Attack on the AES Cipher.
J. Hardw. Syst. Secur., 2017

Vulnerability-Aware Energy Optimization Using Reconfigurable Caches in Multicore Systems.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Trojan localization using symbolic algebra.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Reliability and energy-aware cache reconfiguration for embedded systems.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection.
Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security, 2016

2015
Trace Buffer Attack: Security versus observability study in post-silicon debug.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015


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