Yuanwei Fang

According to our database1, Yuanwei Fang authored at least 10 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
NPS: A Framework for Accurate Program Sampling Using Graph Neural Network.
CoRR, 2023

2022
184QPS/W 64Mb/mm<sup>2</sup>3D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2019
Accelerating Raw Data Analysis with the ACCORDA Software and Hardware Architecture.
Proc. VLDB Endow., 2019

Programmable Acceleration for Sparse Matrices in a Data-Movement Limited World.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2017
UDP: a programmable accelerator for extract-transform-load workloads and more.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

2016
Performance of parallel prefix circuit transition localization of pulsed waveforms.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016

2015
10x10: A Case Study in Highly-Programmable and Energy-Efficient Heterogeneous Federated Architecture.
SIGARCH Comput. Archit. News, 2015

Fast support for unstructured data processing: the unified automata processor.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

2012
A novel hardware-oriented decoding algorithm for non-binary LDPC codes.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012


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