Yuanhu Cheng

According to our database, Yuanhu Cheng authored at least 4 papers between 2022 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

RVAM16: a low-cost multiple-ISA processor based on RISC-V and ARM Thumb.

Libo Huang, Jing Zhang, Ling Yang, Sheng Ma, Yongwen Wang, Yuanhu Cheng

Frontiers Comput. Sci., January, 2025

2024

ImSPU: Implicit Sharing of Computation Resources Between Vector and Scalar Processing Units.

Hongbing Tan, Xiaowei He, Guichu Sun, Liquan Xiao, Yuanhu Cheng, Jing Zhang, Zhong Zheng, Quan Deng, Bingcai Sui, Yongwen Wang, Libo Huang

Proceedings of the Euro-Par 2024: Parallel Processing, 2024

2022

RV16: An Ultra-Low-Cost Embedded RISC-V Processor Core.

Yuanhu Cheng, Libo Huang, Yi-Jun Cui, Sheng Ma, Yongwen Wang, Bingcai Sui

J. Comput. Sci. Technol., 2022

Optimizing Winograd Convolution on GPUs via Partial Kernel Fusion.

Gan Tong, Run Yan, Ling Yang, Mengqiao Lan, Jing Zhang, Yuanhu Cheng, Wentao Ma, Yashuai Lü, Sheng Ma, Libo Huang

Proceedings of the Network and Parallel Computing, 2022