Yuan Wen Hau

Orcid: 0000-0002-4929-3508

According to our database1, Yuan Wen Hau authored at least 19 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
A review on the significance of body temperature interpretation for early infectious disease diagnosis.
Artif. Intell. Rev., December, 2023

2022
Use of learning approaches to predict clinical deterioration in patients based on various variables: a review of the literature.
Artif. Intell. Rev., 2022

2021
A Novel and Reliable Framework of Patient Deterioration Prediction in Intensive Care Unit Based on Long Short-Term Memory-Recurrent Neural Network.
IEEE Access, 2021

2020
A review of breast boundary and pectoral muscle segmentation methods in computer-aided detection/diagnosis of breast mammography.
Artif. Intell. Rev., 2020

ASIC Layout Design-Space Exploration of Pan-and-Tompkins Pre-Processing Algorithm for High Efficiency Electrocardiogram Monitor.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence in Engineering and Technology, 2020

2019
Investigation of Attention Deficit/Hyperactivity Disorder Assessment Using Electro Interstitial Scan Based on Chronoamperometry Technique.
IEEE Access, 2019

An Efficient Instantaneous ECG Delineation Algorithm.
Proceedings of the 46th Computing in Cardiology, 2019

2017
Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms.
J. Syst. Archit., 2017

Embedded system-on-chip design of atrial fibrillation classifier.
Proceedings of the International SoC Design Conference, 2017

2016
Adaptive network selection mechanism for telecardiology system in developing countries.
Proceedings of the 2016 IEEE-EMBS International Conference on Biomedical and Health Informatics, 2016

2015
Hardware/software partitioning of embedded System-on-Chip applications.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Adaptive Configurable Transactional Memory for Multi-processor FPGA Platforms.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014
Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip.
Appl. Comput. Intell. Soft Comput., 2014

Remote dynamically reconfigurable platform using NetFPGA.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Hardware transactional memory on multi-processor FPGA platform.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Packet logging mechanism for adaptive online fault detection on Network-on-Chip.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Feasible transition path generation for EFSM-based system testing.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Network partitioning and GA heuristic crossover for NoC application mapping.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2011
A Network-on-Chip simulation framework for homogeneous Multi-Processor System-on-Chip.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011


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