Yu Yonezawa

According to our database, Yu Yonezawa authored at least 6 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Analytical Model of Maximum Operating Frequency of Class-D ZVS Inverter with Linearized Parasitic Capacitance and any Duty Ratio.

Yi Xiong, Senanayake Thilak, Yu Yonezawa, Jun Imaoka, Masayoshi Yamamoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024

2023

A current fed full bridge converter with auxiliary resonant capacitor.

Tomoki Yamada, Yu Yonezawa, Masayoshi Yamamoto

IEICE Electron. Express, 2023

2022

Analytical Model of Class-D Inverter for High-frequency Operation.

Yi Xiong, Senanayake Thilak, Daisuke Arai, Yu Yonezawa, Jun Imaoka, Masayoshi Yamamoto

Proceedings of the IECON 2022, 2022

2006

Equivalent Circuit Analysis for Time-Coordinated Non-arcing Operation of Reed Switches.

Noboru Wakatsuki, Yu Yonezawa, Atsushi Yamamoto

IEICE Trans. Electron., 2006

2005

Fabrication Process of Nonarcing Power MEMS Switch.

Yu Yonezawa, Noboru Wakatsuki, Yoshio Satoh, Tadashi Nakatani, Koichiro Sawa

IEICE Trans. Electron., 2005

Time-Coordinated Switching Relay for Arc Discharge Suppression.

Noboru Wakatsuki, Yuuich Akiba, Yu Yonezawa

IEICE Trans. Electron., 2005