Yu-Yee Liow
According to our database1,
Yu-Yee Liow
authored at least 5 papers
between 1996 and 2004.
Collaborative distances:
Collaborative distances:
Timeline
1996
1997
1998
1999
2000
2001
2002
2003
2004
0
1
2
1
1
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2004
New current-mode wave-pipelined architectures for high-speed analog-to-digital converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
2002
The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
1999
A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1996
A 1.2 V CMOS multiplier using low-power current-sensing complementary pass-transistor logic.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996