Yu Wang

Xueqing Li

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

TaskFlex Solver for Multi-Agent Pursuit via Automatic Curriculum Learning.

[BibT_eX]

[DOI]

CoRR, 2023

MASP: Scalable GNN-based Planning for Multi-Agent Navigation.

[BibT_eX]

[DOI]

CoRR, 2023

FlashDecoding++: Faster Large Language Model Inference on GPUs.

[BibT_eX]

[DOI]

CoRR, 2023

Large Trajectory Models are Scalable Motion Predictors and Planners.

[BibT_eX]

[DOI]

CoRR, 2023

TDPP: Two-Dimensional Permutation-Based Protection of Memristive Deep Neural Networks.

[BibT_eX]

[DOI]

Minhui Zou

Zhenhua Zhu

Tzofnat Greenberg-Toledo

CoRR, 2023

Skeleton-of-Thought: Large Language Models Can Do Parallel Decoding.

[BibT_eX]

[DOI]

CoRR, 2023

Dynamic Ensemble of Low-fidelity Experts: Mitigating NAS "Cold-Start".

[BibT_eX]

[DOI]

CoRR, 2023

CogDL: A Comprehensive Library for Graph Deep Learning.

[BibT_eX]

[DOI]

Proceedings of the ACM Web Conference 2023, 2023

HyperGef: A Framework Enabling Efficient Fusion for Hypergraph Neural Network on GPUs.

[BibT_eX]

[DOI]

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

Exploiting Hardware Utilization and Adaptive Dataflow for Efficient Sparse Convolution in 3D Point Clouds.

[BibT_eX]

[DOI]

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

DF-GAS: a Distributed FPGA-as-a-Service Architecture towards Billion-Scale Graph-based Approximate Nearest Neighbor Search.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

A Three-Step Multi-Resolution Time-to-Digital Converter.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

OMS-DPM: Optimizing the Model Schedule for Diffusion Probabilistic Models.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Machine Learning, 2023

Learning Zero-Shot Cooperation with Humans, Assuming Humans Are Biased.

[BibT_eX]

[DOI]

Proceedings of the Eleventh International Conference on Learning Representations, 2023

Ada3D : Exploiting the Spatial Redundancy with Adaptive Inference for Efficient 3D Object Detection.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

TSTC: Two-Level Sparsity Tensor Core Enabling both Algorithm Flexibility and Hardware Efficiency.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

A Point Transformer Accelerator with Fine-Grained Pipelines and Distribution-Aware Dynamic FPS.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

UAV Swarm Planning accelerator on FPGA with low latency and fixed-point L-BFGS Quasi-Newton solver.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2023

Minimizing Communication Conflicts in Network-On-Chip Based Processing-In-Memory Architecture.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

CLAP: Locality Aware and Parallel Triangle Counting with Content Addressable Memory.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Memory-Efficient and Real-Time SPAD-based dToF Depth Sensor with Spatial and Statistical Correlation.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

MIPI 2023 Challenge on RGB+ToF Depth Completion: Methods and Results.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

TorchSparse++: Efficient Point Cloud Engine.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

MD-RadioMap: Multi-Drone Radio Map Building via Single-Anchor Ultra-Wideband Localization Network.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Automation Science and Engineering, 2023

Asynchronous Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-Robot Cooperative Exploration.

[BibT_eX]

[DOI]

Proceedings of the 2023 International Conference on Autonomous Agents and Multiagent Systems, 2023

Learning Graph-Enhanced Commander-Executor for Multi-Agent Navigation.

[BibT_eX]

[DOI]

Proceedings of the 2023 International Conference on Autonomous Agents and Multiagent Systems, 2023

Fictitious Cross-Play: Learning Global Nash Equilibrium in Mixed Cooperative-Competitive Games.

[BibT_eX]

[DOI]

Proceedings of the 2023 International Conference on Autonomous Agents and Multiagent Systems, 2023

NTGAT: A Graph Attention Network Accelerator with Runtime Node Tailoring.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Dynamic Ensemble of Low-Fidelity Experts: Mitigating NAS "Cold-Start".

[BibT_eX]

[DOI]

Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

Memory-Oriented Structural Pruning for Efficient Image Restoration.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

Ensemble-in-One: Ensemble Learning within Random Gated Networks for Enhanced Adversarial Robustness.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

2022

Soft Error Tolerant Convolutional Neural Networks on FPGAs With Ensemble Learning.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

A Unified FPGA Virtualization Framework for General-Purpose Deep Neural Networks in the Cloud.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2022

Exploring the Potential of Low-Bit Training of Convolutional Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

INCAME: Interruptible CNN Accelerator for Multirobot Exploration.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Corrections to "MR-TopoMap: Multi-Robot Exploration Based on Topological Map in Communication Restricted Environment".

[BibT_eX]

[DOI]

IEEE Robotics Autom. Lett., 2022

MR-TopoMap: Multi-Robot Exploration Based on Topological Map in Communication Restricted Environment.

[BibT_eX]

[DOI]

IEEE Robotics Autom. Lett., 2022

A Framework to Co-Optimize Robot Exploration and Task Planning in Unknown Environments.

[BibT_eX]

[DOI]

IEEE Robotics Autom. Lett., 2022

Point Cloud Change Detection With Stereo V-SLAM: Dataset, Metrics and Baseline.

[BibT_eX]

[DOI]

IEEE Robotics Autom. Lett., 2022

MR-GMMapping: Communication Efficient Multi-Robot Mapping System via Gaussian Mixture Model.

[BibT_eX]

[DOI]

IEEE Robotics Autom. Lett., 2022

Weakly-supervised semantic segmentation with superpixel guided local and global consistency.

[BibT_eX]

[DOI]

Pattern Recognit., 2022

A Learning-Based AoA Estimation Method for Device-Free Localization.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2022

Cross-layer Attention Network for Fine-grained Visual Categorization.

[BibT_eX]

[DOI]

Ranran Huang

CoRR, 2022

Primal-dual Estimator Learning: an Offline Constrained Moving Horizon Estimation Method with Feasibility and Near-optimality Guarantees.

[BibT_eX]

[DOI]

CoRR, 2022

Heuristic Adaptability to Input Dynamics for SpMM on GPUs.

[BibT_eX]

[DOI]

CoRR, 2022

Multi-UAV Coverage Planning with Limited Endurance in Disaster Environment.

[BibT_eX]

[DOI]

CoRR, 2022

A Mobile Robot Experiment System with Lightweight Simulator Generator for Deep Reinforcement Learning Algorithm.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

MR-GMMExplore: Multi-Robot Exploration System in Unknown Environments based on Gaussian Mixture Model.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

A Benchmark of Planning-based Exploration Methods in Photo-Realistic 3D Simulator.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

The Surprising Effectiveness of PPO in Cooperative Multi-Agent Games.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

TA-GATES: An Encoding Scheme for Neural Network Architectures.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

Understanding GNN Computational Graph: A Coordinated Computation, IO, and Memory Perspective.

[BibT_eX]

[DOI]

Proceedings of the Fifth Conference on Machine Learning and Systems, 2022

Optimizing Graph-based Approximate Nearest Neighbor Search: Stronger and Smarter.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Mobile Data Management, 2022

WESCO: Weight-encoded Reliability and Security Co-design for In-memory Computing Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Efficient Autonomous Driving System Design: From Software to Hardware.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

DIMMining: pruning-efficient and parallel graph mining on near-memory-computing.

[BibT_eX]

[DOI]

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

MOM: Microphone based 3D Orientation Measurement.

[BibT_eX]

[DOI]

Proceedings of the 21st ACM/IEEE International Conference on Information Processing in Sensor Networks, 2022

Relative Distributed Formation and Obstacle Avoidance with Multi-agent Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the 2022 International Conference on Robotics and Automation, 2022

Explore-Bench: Data Sets, Metrics and Evaluations for Frontier-based and Deep-reinforcement-learning-based Autonomous Exploration.

[BibT_eX]

[DOI]

Proceedings of the 2022 International Conference on Robotics and Automation, 2022

Multi-UAV Disaster Environment Coverage Planning with Limited-Endurance.

[BibT_eX]

[DOI]

Proceedings of the 2022 International Conference on Robotics and Automation, 2022

SAVE: Spatial-Attention Visual Exploration.

[BibT_eX]

[DOI]

Proceedings of the 2022 IEEE International Conference on Image Processing, 2022

On the Performance Bound of Multi-Agent Formation with Localization Uncertainty.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Communications, 2022

A-U3D: A Unified 2D/3D CNN Accelerator on the Versal Platform for Disparity Estimation.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

CLOSE: Curriculum Learning on the Sharing Extent Towards Better One-Shot NAS.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2022, 2022

Learning Efficient Multi-agent Cooperative Visual Exploration.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2022, 2022

Exploiting Parallelism with Vertex-Clustering in Processing-In-Memory-based GCN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Gibbon: Efficient Co-Exploration of NN Model and Processing-In-Memory Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Heuristic adaptability to input dynamics for SpMM on CPUs.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

CodedVTR: Codebook-based Sparse Voxel Transformer with Geometric Guidance.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

FedCor: Correlation-Based Active Client Selection Strategy for Heterogeneous Federated Learning.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

VMAPD: Generate Diverse Solutions for Multi-Agent Games with Recurrent Trajectory Discriminators.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Games, CoG 2022, Beijing, 2022

Primal-Dual Estimator Learning Method with Feasibility and Near-Optimality Guarantees.

[BibT_eX]

[DOI]

Proceedings of the 61st IEEE Conference on Decision and Control, 2022

A one-for-all and o(v log(v ))-cost solution for parallel merge style operations on sorted key-value arrays.

[BibT_eX]

[DOI]

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021

FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2021

Machine Learning for Electronic Design Automation: A Survey.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2021

Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Rescuing RRAM-Based Computing From Static and Dynamic Faults.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Multi-Agent Vulnerability Discovery for Autonomous Driving with Hazard Arbitration Reward.

[BibT_eX]

[DOI]

CoRR, 2021

A drl based distributed formation control scheme with stream based collision avoidance.

[BibT_eX]

[DOI]

CoRR, 2021

Efficient Sparse Matrix Kernels based on Adaptive Workload-Balancing and Parallel-Reduction.

[BibT_eX]

[DOI]

CoRR, 2021

BoolNet: Minimizing The Energy Consumption of Binary Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2021

Ensemble-in-One: Learning Ensemble within Random Gated Networks for Enhanced Adversarial Robustness.

[BibT_eX]

[DOI]

CoRR, 2021

FedGP: Correlation-Based Active Client Selection for Heterogeneous Federated Learning.

[BibT_eX]

[DOI]

CoRR, 2021

The Surprising Effectiveness of MAPPO in Cooperative, Multi-Agent Games.

[BibT_eX]

[DOI]

CoRR, 2021

CogDL: An Extensive Toolkit for Deep Learning on Graphs.

[BibT_eX]

[DOI]

CoRR, 2021

Low-Cost Multi-Agent Navigation via Reinforcement Learning With Multi-Fidelity Simulator.

[BibT_eX]

[DOI]

IEEE Access, 2021

Evaluating Efficient Performance Estimators of Neural Architectures.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

Variational Automatic Curriculum Learning for Sparse-Reward Cooperative Multi-Agent Problems.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

SMMR-Explore: SubMap-based Multi-Robot Exploration System with Multi-robot Multi-target Potential Field Exploration Method.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Robotics and Automation, 2021

Discovering Diverse Multi-Agent Strategic Behavior via Reward Randomization.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Learning Representations, 2021

Enhancing Adversarial Robustness For Image Classification By Regularizing Class Level Feature Distribution.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE International Conference on Image Processing, 2021

Exploiting Online Locality and Reduction Parallelism for Sampled Dense Matrix Multiplication on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Rerec: In-ReRAM Acceleration with Access-Aware Mapping for Personalized Recommendation.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

FedSwap: A Federated Learning based 5G Decentralized Dynamic Spectrum Access System.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Depression Detection by Analysing Eye Movements on Emotional Images.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2021

On the Performance of Multi-Agent Detection in Mobile Delay-Sensitive Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Communications Conference, 2021

Cooperative Dynamic Coverage Control in Wireless Camera Sensor Networks with Anisotropic Perception.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Communications Conference, 2021

3M-AI: A Multi-task and Multi-core Virtualization Framework for Multi-FPGA AI Systems in the Cloud.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

GAME: Gaussian Mixture Model Mapping and Navigation Engine on Embedded FPGA.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Hermes: Decentralized Dynamic Spectrum Access System for Massive Devices Deployment in 5G.

[BibT_eX]

[DOI]

Proceedings of the EWSN '21: Proceedings of the 2021 International Conference on Embedded Wireless Systems and Networks, 2021

Adversarial Robustness Under Long-Tailed Distribution.

[BibT_eX]

[DOI]

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

Reliability-Aware Training and Performance Modeling for Processing-In-Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Efficient Computing Platform Design for Autonomous Driving Systems.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

MNSIM-TIME: Performance Modeling Framework for Training-In-Memory Architectures.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

Ensemble of Pruned Networks for Reliable Classifiers.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020

Algorithmic Fault Detection for RRAM-based Matrix Operations.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2020

One-Shot Refresh: A Low-Power Low-Congestion Approach for Dynamic Memories.

[BibT_eX]

[DOI]

Xueqing Li

IEEE Trans. Circuits Syst., 2020

DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Low Bit-Width Convolutional Neural Network on RRAM.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

WSODPB: Weakly supervised object detection with PCSNet and box regression module.

[BibT_eX]

[DOI]

Neurocomputing, 2020

Nonparametric Topic Modeling with Neural Inference.

[BibT_eX]

[DOI]

Neurocomputing, 2020

Semantic head enhanced pedestrian detection in a crowd.

[BibT_eX]

[DOI]

Ruiqi Lu

Huimin Ma

Neurocomputing, 2020

Multi-shot NAS for Discovering Adversarially Robust Convolutional Neural Architectures at Targeted Capacities.

[BibT_eX]

[DOI]

CoRR, 2020

aw_nas: A Modularized and Extensible NAS framework.

[BibT_eX]

[DOI]

CoRR, 2020

BARS: Joint Search of Cell Topology and Layout for Accurate and Efficient Binary ARchitectures.

[BibT_eX]

[DOI]

CoRR, 2020

A Surgery of the Neural Architecture Evaluators.

[BibT_eX]

[DOI]

CoRR, 2020

Physical Adversarial Attack on Vehicle Detector in the Carla Simulator.

[BibT_eX]

[DOI]

CoRR, 2020

Towards Lower Bit Multiplication for Convolutional Neural Network Training.

[BibT_eX]

[DOI]

CoRR, 2020

FTT-NAS: Discovering Fault-Tolerant Neural Architecture.

[BibT_eX]

[DOI]

CoRR, 2020

Efficient 16 Boolean logic and arithmetic based on bipolar oxide memristors.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2020

Optimizing CNN Accelerator With Improved Roofline Model.

[BibT_eX]

[DOI]

Shaoxia Fang

Shulin Zeng

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

GE-SpMM: general-purpose sparse matrix-matrix multiplication on GPUs for graph neural networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference for High Performance Computing, 2020

DualLip: A System for Joint Lip Reading and Generation.

[BibT_eX]

[DOI]

Proceedings of the MM '20: The 28th ACM International Conference on Multimedia, 2020

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface.

[BibT_eX]

[DOI]

Xueqing Li

Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

CNN-based Monocular Decentralized SLAM on embedded FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

AVD-Net: Attention Value Decomposition Network For Deep Multi-Agent Reinforcement Learning.

[BibT_eX]

[DOI]

Yuanxin Zhang

Huimin Ma

Proceedings of the 25th International Conference on Pattern Recognition, 2020

GraphSDH: A General Graph Sampling Framework with Distribution and Hierarchy.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

LessMine: Reducing Sample Space and Data Access for Dense Pattern Mining.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

Communication Lower Bound in Convolution Accelerators.

[BibT_eX]

[DOI]

Yinhe Han

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

An Order Sampling Processing-in-Memory Architecture for Approximate Graph Pattern Mining.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Enable Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

INCAME: INterruptible CNN Accelerator for Multi-robot Exploration.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

CNN-based Feature-point Extraction for Real-time Visual SLAM on Embedded FPGA.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Distribution-Balanced Loss for Multi-label Classification in Long-Tailed Datasets.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2020, 2020

A Generic Graph-Based Neural Architecture Encoding Scheme for Predictor-Based NAS.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2020, 2020

DSA: More Efficient Budgeted Pruning via Differentiable Sparsity Allocation.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ECCV 2020, 2020

Reliable Classification with Ensemble Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

Reliability Evaluation of Pruned Neural Networks against Errors on Parameters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

Security Enhancement for RRAM Computing System through Obfuscating Crossbar Row Connections.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

INCA: INterruptible CNN Accelerator for Multi-tasking in Embedded Robots.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Attentional Separation-and-Aggregation Network for Self-supervised Depth-Pose Learning in Dynamic Scenes.

[BibT_eX]

[DOI]

Proceedings of the 4th Conference on Robot Learning, 2020

Black Box Search Space Profiling for Accelerator-Aware Neural Architecture Search.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

An Energy-Efficient Quantized and Regularized Training Framework For Processing-In-Memory Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

FTT-NAS: Discovering Fault-Tolerant Neural Architecture.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

Feature Variance Regularization: A Simple Way to Improve the Generalizability of Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020

Towards Energy-Efficient Systems for Artificial Intelligence in the Future.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Cognitive Informatics & Cognitive Computing, 2020

2019

[DL] A Survey of FPGA-based Neural Network Inference Accelerators.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2019

Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing Systems.

[BibT_eX]

[DOI]

Xuefei Ning

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

HyVE: Hybrid Vertex-Edge Memory Hierarchy for Energy-Efficient Graph Processing.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Designing scrubbing strategy for memories suffering MCUs through the selection of optimal interleaving distance.

[BibT_eX]

[DOI]

Int. J. Comput. Sci. Eng., 2019

A DenseNet feature-based loop closure method for visual SLAM system.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Conference on Robotics and Biomimetics, 2019

On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Metric Learning in Codebook Generation of Bag-of-Words for Person Re-identification.

[BibT_eX]

[DOI]

Lu Tian

Ranran Huang

Proceedings of the 8th International Conference on Pattern Recognition Applications and Methods, 2019

An In-depth Comparison of Compilers for Deep Neural Networks on Hardware.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019

HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Augmentation Invariant Training.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019

A General Logic Synthesis Framework for Memristor-based Logic Design.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Enabling Secure in-Memory Neural Network Computing by Sparse Fast Gradient Encryption.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

A Fine-Grained Sparse Accelerator for Multi-Precision DNN.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

DNNVM: End-to-End Compiler Leveraging Operation Fusion on FPGA-based CNN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Compressed CNN Training with FPGA-based Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Memory-Bound Proof-of-Work Acceleration for Blockchain Applications.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Fault tolerance in neuromorphic computing systems.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Learning the sparsity for ReRAM: mapping and pruning sparse neural network for ReRAM based accelerator.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

GraphSAR: a sparsity-aware processing-in-memory architecture for large-scale graph processing on ReRAMs.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Multi-task ADAS system on FPGA.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018

Instruction Driven Cross-layer CNN Accelerator for Fast Detection on FPGA.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2018

Bidirectional Database Storage and SQL Query Exploiting RRAM-Based Process-in-Memory Structure.

[BibT_eX]

[DOI]

Yuliang Sun

ACM Trans. Storage, 2018

Towards Real-Time Object Detection on Embedded Systems.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2018

MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Optimizing Cache Bypassing and Warp Scheduling for GPUs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Angel-Eye: A Complete Design Flow for Mapping CNN Onto Embedded FPGA.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Stuck-at Fault Tolerance in RRAM Computing Systems.

[BibT_eX]

[DOI]

Yuan Xie

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Nonparametric Topic Modeling with Neural Inference.

[BibT_eX]

[DOI]

CoRR, 2018

PoTrojan: powerful neural-level trojan designs in deep learning models.

[BibT_eX]

[DOI]

CoRR, 2018

Low power driven loop tiling for RRAM crossbar-based CNN.

[BibT_eX]

[DOI]

Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

GraphIA: an in-situ accelerator for large-scale graph processing.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2018

Fault Tolerance for RRAM-Based Matrix Operations.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

Hu-Fu: Hardware and Software Collaborative Attack Framework Against Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

RRAM Based Buffer Design for Energy Efficient CNN Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Deep Gradient Compression: Reducing the Communication Bandwidth for Distributed Training.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Learning Representations, 2018

An Efficient Reconfigurable Framework for General Purpose CNN-RNN Models on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Real-Time Object Detection and Semantic Segmentation Hardware System with Deep Learning Networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2018

NewGraph: Balanced Large-Scale Graph Processing on FPGAs with Low Preprocessing Overheads.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

Design of fault-tolerant neuromorphic computing systems.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE European Test Symposium, 2018

Real-time object detection towards high power efficiency.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

A peripheral circuit reuse structure integrated with a retimed data flow for low power RRAM crossbar-based CNN.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Rescuing memristor-based computing with non-linear resistance levels.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

HyVE: Hybrid vertex-edge memory hierarchy for energy-efficient graph processing.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

Training low bitwidth convolutional neural network on RRAM.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

The First 25 Years of the FPL Conference: Significant Papers.

[BibT_eX]

[DOI]

Philip Heng Wai Leong

ACM Trans. Reconfigurable Technol. Syst., 2017

Exploiting Stable Data Dependency in Stream Processing Acceleration on FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2017

Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2017

A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

A General Framework for Hardware Trojan Detection in Digital Circuits by Statistical Learning Algorithms.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Software-Hardware Codesign for Efficient Neural Network Acceleration.

[BibT_eX]

[DOI]

IEEE Micro, 2017

A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

A Survey of FPGA Based Neural Network Accelerator.

[BibT_eX]

[DOI]

CoRR, 2017

A Deep Learning Approach for Blind Drift Calibration of Sensor Networks.

[BibT_eX]

[DOI]

CoRR, 2017

Exploring the Regularity of Sparse Structure in Convolutional Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2017

Energy-efficient SQL query exploiting RRAM-based process-in-memory structure.

[BibT_eX]

[DOI]

Yuliang Sun

Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Low-overhead implementation of logic encryption using gate replacement techniques.

[BibT_eX]

[DOI]

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing.

[BibT_eX]

[DOI]

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Streaming sorting network based BWT acceleration on FPGA for lossless compression.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2017

Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2017

ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA.

[BibT_eX]

[DOI]

William (Bill) J. Dally

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

An FPGA Design Framework for CNN Sparsification and Acceleration.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems.

[BibT_eX]

[DOI]

Xuefei Ning

Proceedings of the 54th Annual Design Automation Conference, 2017

TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Exploring the Granularity of Sparsity in Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2017

Binary convolutional neural network on RRAM.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Computation-oriented fault-tolerance schemes for RRAM computing systems.

[BibT_eX]

[DOI]

Yuan Xie

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Guest Editorial: Design and Applications of Neuromorphic Computing System.

[BibT_eX]

[DOI]

Hai (Helen) Li

Qinru Qiu

IEEE Trans. Multi Scale Comput. Syst., 2016

Harmonica: A Framework of Heterogeneous Computing Systems With Memristor-Based Neuromorphic Computing Accelerators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A Unified Methodology for Designing Hardware Random Number Generators Based on Any Probability Distribution.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2016

Solar Power Prediction Assisted Intra-task Scheduling for Nonvolatile Sensor Nodes.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron.

[BibT_eX]

[DOI]

Jacques-Olivier Klein

Weisheng Zhao

IEEE Trans. Biomed. Circuits Syst., 2016

Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2016

Editorial: Special Issue on The 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics 2015).

[BibT_eX]

[DOI]

Xin Li

Sheldon X.-D. Tan

Integr., 2016

Leveraging Stochastic Memristor Devices in Neuromorphic Hardware Systems.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Exploring the Precision Limitation for RRAM-Based Analog Approximate Computing.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA.

[BibT_eX]

[DOI]

CoRR, 2016

Global and regional cortical connectivity maturation index (CCMI) of developmental human brain with quantification of short-range association tracts.

[BibT_eX]

[DOI]

Proceedings of the Medical Imaging 2016: Biomedical Applications in Molecular, Structural, and Functional Imaging, San Diego, California, United States, 27 February, 2016

Angel-Eye: A Complete Design Flow for Mapping CNN onto Customized Hardware.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Low power Convolutional Neural Networks on a chip.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Heterogeneous systems with reconfigurable neuromorphic computing accelerators.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory.

[BibT_eX]

[DOI]

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

NXgraph: An efficient graph processing system on a single machine.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Conference on Data Engineering, 2016

A data locality-aware design framework for reconfigurable sparse matrix-vector multiplication kernel.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

From model to FPGA: Software-hardware co-design for efficient neural network acceleration.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

Approximate Frequent Itemset Mining for streaming data on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

SRI-SURF: A better SURF powered by scaled-RAM interpolator on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Going Deeper with Embedded FPGA Platform for Convolutional Neural Network.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

Real-Time Pedestrian Detection and Tracking on Customized Hardware.

[BibT_eX]

[DOI]

Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016

MNSIM: Simulation platform for memristor-based neuromorphic computing system.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Sparsity-oriented sparse solver design for circuit simulation.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Switched by input: power efficient structure for RRAM-based convolutional neural network.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

RRAM based learning acceleration.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Compilers, 2016

Performance-centric register file design for GPUs using racetrack memory.

[BibT_eX]

[DOI]

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

HS3-DPG: Hierarchical Simulation for 3-D P/G Network.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Whitespace-Aware TSV Arrangement in 3-D Clock Tree Synthesis.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2015

Real-Time High-Quality Stereo Vision System in FPGA.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2015

RRAM-Based Analog Approximate Computing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

FASTrust: Feature analysis for third-party IP trust verification.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Test Conference, 2015

Leveraging emerging nonvolatile memory in high-level synthesis with loop transformations.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Hi-fi playback: tolerating position errors in shift operations of racetrack memory.

[BibT_eX]

[DOI]

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Rebooting Computing and Low-Power Image Recognition Challenge.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Coordinated static and dynamic cache bypassing for GPUs.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Energy Efficient RRAM Spiking Neural Network for Real Time Classification.

[BibT_eX]

[DOI]

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

A self-aware data compression system on FPGA in Hadoop.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

An FPGA-based real-time simultaneous localization and mapping system.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Significant papers from the first 25 years of the FPL conference.

[BibT_eX]

[DOI]

Philip Heng Wai Leong

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access.

[BibT_eX]

[DOI]

Xinyu Niu

Wayne Luk

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

FPGA Acceleration of Recurrent Neural Network Based Language Model.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

Spiking neural network with RRAM: can we use it for real-world application?

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A fast parallel sparse solver for SPICE-based circuit simulators.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

A STT-RAM-based low-power hybrid register file for GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

An accurate and low-cost PM2.5 estimation method based on Artificial Neural Network.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Modeling and optimization of low power resonant clock mesh.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Technological exploration of RRAM crossbar array for matrix-vector multiplication.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2014

PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

On-Chip Hybrid Power Supply System for Wireless Sensor Nodes.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2014

Exploration of Electrical and Novel Optical Chip-to-Chip Interconnects.

[BibT_eX]

[DOI]

IEEE Des. Test, 2014

Efficient region-aware P/G TSV planning for 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Energy efficient spiking neural network design with RRAM devices.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Large scale recurrent neural network on GPU.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

A universal FPGA-based floating-point matrix processor for mobile systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Online scheduling for FPGA computation in the Cloud.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Accelerating frequent item counting with FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

ICE: Inline calibration for memristor crossbar-based computing engine.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Energy efficient neural networks for big data analytics.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Design Methodologies for 3D Mixed Signal Integrated Circuits: a Practical 12-bit SAR ADC Design Case.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Enabling FPGAs in the cloud.

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, CF'14, 2014

Training itself: Mixed-signal training acceleration for memristor-based neural network.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

The stochastic modeling of TiO2 memristor and its usage in neuromorphic system design.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Statistical analysis of random telegraph noise in digital circuits.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

On-Chip Sensor Network for Efficient Management of Power Gating-Induced Power/Ground Noise in Multiprocessor System on Chip.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2013

NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Unification of PR Region floorplanning and Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2013

Evaluation and mitigation of performance degradation under random telegraph noise for digital circuits.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2013

Assessment of Circuit Optimization Techniques Under NBTI.

[BibT_eX]

[DOI]

IEEE Des. Test, 2013

Nonzero pattern analysis and memory access optimization in GPU-based sparse LU factorization for circuit simulation.

[BibT_eX]

[DOI]

Proceedings of the 3rd Workshop on Irregular Applications - Architectures and Algorithms, 2013

RALP: Reconvergence-aware layer partitioning for 3D FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Whitespace-aware TSV arrangement in 3D clock tree synthesis.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

TSV-aware topology generation for 3D Clock Tree Synthesis.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Quality Electronic Design, 2013

Memristor-based approximated computation.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

ADAMS: asymmetric differential STT-RAM cell structure for reliable and high-performance applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

DTW-Based Subsequence Similarity Search on AMD Heterogeneous Computing Platform.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Dynamic Stencil: Effective exploitation of run-time resources in reconfigurable clusters.

[BibT_eX]

[DOI]

Xinyu Niu

José Gabriel F. Coutinho

Wayne Luk

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Accelerating subsequence similarity search based on dynamic time warping distance with FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

HS3DPG: Hierarchical simulation for 3D P/G network.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Data dependency aware prefetch scheduling for Dynamic Partial reconfigurable designs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-Vth/Vdd Library and Device Sizing.

[BibT_eX]

[DOI]

J. Electr. Comput. Eng., 2012

Temporal Performance Degradation under RTN: Evaluation and Mitigation for Nanoscale Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Improving energy efficiency of write-asymmetric memories by log style write.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Probabilistic Brain Fiber Tractography on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Parallel Circuit Simulation on Multi/Many-core Systems.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

FPGA based memory efficient high resolution stereo vision system for video tolling.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Parallel FPGA-based all pairs shortest paths for sparse networks: A human brain connectome case study.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Pub/Sub on stream: a multi-core based message broker with QoS support.

[BibT_eX]

[DOI]

Proceedings of the Sixth ACM International Conference on Distributed Event-Based Systems, 2012

PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Sparse LU factorization for parallel circuit simulation on GPU.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Yield-aware time-efficient testing and self-fixing design for TSV-based 3D ICs.

[BibT_eX]

[DOI]

Jing Xie

Yuan Xie

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Thermal-aware power network design for IR drop reduction in 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

An adaptive LU factorization algorithm for parallel circuit simulation.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

A Reconfigurable Computing Approach for Efficient and Scalable Parallel Graph Exploration.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012

PDPR: Fine-Grained Placement for Dynamic Partially Reconfigurable FPGAs.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011

Power Gating Aware Task Scheduling in MPSoC.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2011

Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2011

An FPGA-based accelerator for LambdaRank in Web search engines.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2011

Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2011

An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2011

Leakage-Aware TSV-Planning with Power-Temperature-Delay Dependence in 3D ICs.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Circuit-level delay modeling considering both TDDB and NBTI.

[BibT_eX]

[DOI]

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Gemma in April: A matrix-like parallel programming architecture on OpenCL.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Tree-Based Partitioning Approach for Network-on-Chip Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Computer-Aided Design and Computer Graphics, 2011

Network flow-based simultaneous retiming and slack budgeting for low power design.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

Rethinking thermal via planning with timing-power-temperature dependence for 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

On-chip hybrid power supply system for wireless sensor nodes.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

Incremental layout optimization for NoC designs based on MILP formulation.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

Output remapping technique for critical paths soft-error rate reduction.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2010

Fast-locking all-digital phase-locked loop with digitally controlled oscillator tuning word estimating and presetting.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2010

FPGA and GPU implementation of large scale SpMV.

[BibT_eX]

[DOI]

Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010

Efficient PageRank and SpMV Computation on AMD GPUs.

[BibT_eX]

[DOI]

Proceedings of the 39th International Conference on Parallel Processing, 2010

Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010

LambdaRank acceleration for relevance ranking in web search engines (abstract only).

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

FPMR: MapReduce framework on FPGA.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Simultaneous slack budgeting and retiming for synchronous circuits optimization.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

PS-FPG: pattern selection based co-design of floorplan and power/ground network with wiring resource optimization.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Three-dimensional integrated circuits (3D IC) floorplan and power/ground network co-synthesis.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Parametric yield driven resource binding in behavioral synthesis with multi-Vth/Vdd library.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Minimizing leakage power in aging-bounded high-level synthesis with design time multi-Vth assignment.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Leakage Power Reduction through Dual Vth Assignment Considering Threshold voltage Variation.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2009

New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components.

[BibT_eX]

[DOI]

Michael DeBole

Krishnan Ramakrishnan

Narayanan Vijaykrishnan

Int. J. Parallel Program., 2009

Thermal-Aware Incremental Floorplanning for 3D ICs Based on MILP Formulation.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Temperature-Aware NBTI Modeling Techniques in Digital Circuits.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2009

On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

Modern Floorplanning with Boundary Clustering Constraint.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

On the efficacy of input Vector Control to mitigate NBTI effects and leakage power.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

NBTI-aware statistical circuit delay assessment.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Variation-aware supply voltage assignment for minimizing circuit degradation and leakage.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

RankBoost Acceleration on both NVIDIA CUDA and ATI Stream Platforms.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

Multi-objective Floorplanning Based on Fuzzy Logic.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Conference on Fuzzy Systems and Knowledge Discovery, 2009

FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Gate replacement techniques for simultaneous leakage and aging optimization.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

An efficient technique for analysis of minimal buffer requirements of synchronous dataflow graphs with model checking.

[BibT_eX]

[DOI]

Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

A case study of on-chip sensor network in multiprocessor system-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Compilers, 2009

A framework for estimating NBTI degradation of microarchitectural components.

[BibT_eX]

[DOI]

Michael DeBole

Krishnan Ramakrishnan

Narayanan Vijaykrishnan

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2008

Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths.

[BibT_eX]

[DOI]

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application.

[BibT_eX]

[DOI]

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

Dynamic TDM virtual circuit implementation for NoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

Modeling of PMOS NBTI Effect Considering Temperature Variation.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A power gating scheme for ground bounce reduction during mode transition.

[BibT_eX]

[DOI]

Ku He

Rong Luo

Proceedings of the 25th International Conference on Computer Design, 2007

Temperature-aware NBTI modeling and the impact of input vector control on performance degradation.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Signal-Path-Level Dual-VT Assignment for Leakage Power Reduction.

[BibT_eX]

[DOI]

Hui Wang

J. Circuits Syst. Comput., 2006

IR-drop Reduction Through Combinational Circuit Partitioning.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Genetic Algorithm Based Fine-Grain Sleep Transistor Insertion Technique for Leakage Optimization.

[BibT_eX]

[DOI]

Proceedings of the Advances in Natural Computation, Second International Conference, 2006

Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate.

[BibT_eX]

[DOI]

Hui Wang