Yu-Tso Lin
According to our database1,
Yu-Tso Lin
authored at least 9 papers
between 2007 and 2021.
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Bibliography
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Cost-Effective On-Chip Power Impedance Measurement (PIM) System in 7nm FinFET for HPC Applications.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
IEEE Trans. Circuits Syst., 2020
2018
All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply.
IEEE J. Solid State Circuits, 2018
A 0.45V sub-mW all-digital PLL in 16nm FinFET for bluetooth low-energy (BLE) modulation and instantaneous channel hopping using 32.768kHz reference.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
19.6 A 0.2V trifilar-coil DCO with DC-DC converter in 16nm FinFET CMOS with 188dB FOM, 1.3kHz resolution, and frequency pushing of 38MHz/V for energy harvesting applications.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2011
IEEE Trans. Ind. Electron., 2011
2009
IEEE Trans. Biomed. Eng., 2009
2007
A Fully Integrated Concurrent Dual-Band Low Noise Amplifier with Suspended Inductors in SiGe 0.35µm BiCMOS Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007