Yu-Ting Hung

According to our database1, Yu-Ting Hung authored at least 11 papers between 2003 and 2024.

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Bibliography

2024
An All NMOS KY-Boost Converter With Double Injection Control for Fast Line and Load Transient Response.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

An Area-Efficient Low-Jitter Fractional Output Divider With Replica-DTC-Free Background Calibration.
IEEE J. Solid State Circuits, November, 2024

2021
29.5 A 0.008mm<sup>2</sup> 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

2019
A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
How to learn and how to teach computational thinking: Suggestions based on a review of the literature.
Comput. Educ., 2018

2014
An optical target to eliminate impinging light in a light scattering simulation.
Comput. Phys. Commun., 2014

Personalizing Statistical Models for Asthma Prognosis and Therapeutics.
Proceedings of the AMIA 2014, 2014

2004
Intermittent Scan Chain Fault Diagnosis Based on Signal Probability Analysis.
Proceedings of the 2004 Design, 2004

2003
Statistical Diagnosis for Intermittent Scan Chain Hold-Time Fault.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Efficient Diagnosis for Multiple Intermittent Scan Chain Hold-Time Faults.
Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003


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