Yu-Min Lee

Orcid: 0000-0002-4009-924X

According to our database1, Yu-Min Lee authored at least 47 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
SpotLight: A Hotspot-Greedy, Light-Weighted, and Automated Thermal Modeling Framework for Early Smartphone Design.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
Phone-nomenon 2.0: A compact thermal model for smartphones.
IET Comput. Digit. Tech., March, 2023

Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2021
Thermal Pad Design Flow for Automotive Electronics.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

2020
XGBIR: An XGBoost-based IR Drop Predictor for Power Delivery Network.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Multi-angle bended heat pipe design using x-architecture routing with dynamic thermal weight on mobile devices.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Phone-nomenon: a system-level thermal simulator for handheld devices.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2017
NaPer: A TSV Noise-Aware Placer.
IEEE Trans. Very Large Scale Integr. Syst., 2017

InTraSim: Incremental Transient Simulation of Power Grids.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Thermal modeling and design on smartphones with heat pipe cooling technique.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Yield-driven redundant power bump assignment for power network robustness.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2015
LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A TSV noise-aware 3-D placer.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Incremental transient simulation of power grid.
Proceedings of the International Symposium on Physical Design, 2014

2013
An efficient method for analyzing on-chip thermal reliability considering process variations.
ACM Trans. Design Autom. Electr. Syst., 2013

Power delivery network design for wiring and TSV resource minimization in TSV-based 3-D ICs.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

NUMANA: a hybrid <u>num</u>erical and <u>ana</u>lytical thermal simulator for 3-D ICs.
Proceedings of the Design, Automation and Test in Europe, 2013

I-LUTSim: An iterative look-up table based thermal simulator for 3-D ICs.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
On-chip statistical hot-spot estimation using mixed-mesh statistical polynomial expression generating and skew-normal based moment matching techniques.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
Redundant via insertion under timing constraints.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2010
Statistical electro-thermal analysis with high compatibility of leakage power models.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

A hierarchical bin-based legalizer for standard-cell designs with minimal disturbance.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms.
IEEE Trans. Very Large Scale Integr. Syst., 2009

A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

Post-routing redundant via insertion with wire spreading capability.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

Stochastic thermal simulation considering spatial correlated within-die process variations.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Integrating E-services with a Telecommunication E-commerce using Service-Oriented Architecture.
J. Softw., 2008

Incomplete Input Inferences on Fuzzy Expert Systems.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008

A Process-Oriented System Dynamics Model for Software Development Project Prediction.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008

NGOSS-centric Framework of Telecommunication Electronic Commerce.
Proceedings of the 2008 International Symposium on Computer Science and Computational Technology, 2008

Full-chip thermal analysis for the early design stage via generalized integral transforms.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

Timing-constrained yield-driven redundant via insertion.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
Hierarchical power delivery network analysis using Markov chains.
Proceedings of the 2007 IEEE International SOC Conference, 2007

An Aggregation-Based Algebraic Multigrid Method for Power Grid Analysis.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

2003
The power grid transient simulation in linear time based on 3-D alternating-direction-implicit method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Steady-state thermal characteristics of AMR read/write heads used in tape storage drives.
IBM J. Res. Dev., 2003

3D thermal-ADI: an efficient chip-level transient thermal simulator.
Proceedings of the 2003 International Symposium on Physical Design, 2003

The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method .
Proceedings of the 2003 Design, 2003

A hierarchical analysis methodology for chip-level power delivery with realizable model reduction.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian Relaxation.
VLSI Design, 2002

Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery.
Proceedings of the 39th Design Automation Conference, 2002

2001
Linear Time Hierarchical Capacitance Extraction without Multipole Expansion.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Hierarchical model order reduction for signal-integrity interconnect synthesis.
Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

Optimal spacing and capacitance padding for general clock structures.
Proceedings of ASP-DAC 2001, 2001


  Loading...