Yu Lee

According to our database, Yu Lee authored at least 16 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Robust Timing Synchronization Algorithm for 5G New Radio.

Yu Lee, Tzu-Chieh Kao, Zhen-Ming Huang, Hsuan-Po Lin, Chun-Ta Wu, Chao-Yu Chen

Proceedings of the 8th IEEE World Forum on Internet of Things, 2022

2019

A Sustainable Soil Energy Harvesting System With Wide-Range Power-Tracking Architecture.

I-Che Ou, Jia-Ping Yang, Chia-Hung Liu, Kai-Jie Huang, Kun-Ju Tsai, Yu Lee, Yuan-Hua Chu, Yu-Te Liao

IEEE Internet Things J., 2019

2018

A Wide-Range Capacitive DC-DC Converter with 2D-MPPT for Soil/Solar Energy Extraction.

I-Che Ou, Jia-Ping Yang, Chia-Hung Liu, Kai-Jie Huang, Kun-Ju Tsai, Yu Lee, Yuan-Hua Chu, Yu-Te Liao

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A 8 Phases 192MHz Crystal-Less Clock Generator with PVT Calibration.

Ting-Chou Lu, Ming-Dou Ker, Hsiao-Wen Zan, Jen-Chieh Liu, Yu Lee

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2016

Live demonstrator: Challenging the Bio-inspired Artificial Pancreas with a mixed-meal model library.

Pau Herrero, Mohamed Fayez El-Sharkawy, Peter Pesl, Bernard Hernandez, Lorraine Choi, Osama M. Awara, Yu Lee, Jian Lim, Mohamed M. Yusof, Aaron Sheah, Liyangyi Yu, Pantelis Georgiou

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Invited - Wireless sensor nodes for environmental monitoring in internet of things.

Ting-Chou Lu, Li-Ren Huang, Yu Lee, Kun-Ju Tsai, Yu-Te Liao, Nai-Chen Cheng, Yuan-Hua Chu, Yi-Hsing Tsai, Fang-Chu Chen, Tzi-cker Chiueh

Proceedings of the 53rd Annual Design Automation Conference, 2016

2013

A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS.

Chih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng

Proceedings of the ESSCIRC 2013, 2013

2012

A chip-to-chip clock-deskewing circuit for 3-D ICs.

Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010

An embedded wide-range and high-resolution CLOCK jitter measurement circuit.

Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Retargeting Motion of Clothing to New Characters.

Yu Lee, Moon-Ryul Jung

Proceedings of the GRAPP 2009, 2009

2008

A PWM and PAM Signaling Hybrid Technology for Serial-Link Transceivers.

Ching-Yuan Yang, Yu Lee

IEEE Trans. Instrum. Meas., 2008

Experimental Results of Built-In Jitter Measurement for Gigahertz Clock.

Nai-Chen Daniel Cheng, Yu Lee, Ji-Jan Chen

Proceedings of the 17th IEEE Asian Test Symposium, 2008

A programmable duty cycle corrector based on delta-sigma modulated PWM mechanism.

Gung-Yu Lin, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement.

Nai-Chen Daniel Cheng, Yu Lee, Ji-Jan Chen

Proceedings of the 16th Asian Test Symposium, 2007

2006

A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector.

Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee

IEICE Trans. Electron., 2006

2005

A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques.

Ching-Yuan Yang, Yu Lee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005