Yu-Jie Chung

According to our database, Yu-Jie Chung authored at least 4 papers between 2022 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

ESD-capability Study of High-voltage nLDMOSs with out the Drift Region DPW Effect.

Xiu-Yuan Yang, Xing-Chen Mai, Shen-Li Chen, Yu-Jie Chung, Jhong-Yi Lai, Ting-En Lin

Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

High-voltage nLDMOS Drain Side Schottky/SCR Modulations for Enhancement Reliability Capabilities.

Ting-En Lin, Shen-Li Chen, Zhi-Wei Liu, Xing-Chen Mai, Xiu-Yuan Yang, Yu-Jie Chung

Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

2022

An Investigation of ESD-Enhancement by the Drain-side Embedded SCR Area Modulation for HV pLDMOSs.

Zhi-Wei Liu, Shen-Li Chen, Jhong-Yi Lai, Xing-Chen Mai, Yu-Jie Chung

Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

ESD Capability Analysis of High-voltage nLDMOSs by the Bulk Terminal Modulation.

Jhong-Yi Lai, Shen-Li Chen, Zhi-Wei Liu, Xing-Chen Mai, Yu-Jie Chung

Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022