Yu-Hsin Chiu
According to our database1,
Yu-Hsin Chiu
authored at least 2 papers
between 2006 and 2010.
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Bibliography
2010
Concurrent Error Detection in Shifted Dual Basis Multiplier over GF(2m) Using Cyclic Code Approach.
Proceedings of the 24th IEEE International Conference on Advanced Information Networking and Applications Workshops, 2010
2006
New Bit-Parallel Systolic Multiplier over GF(2m) Using The Modified Booth's Algorithm.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006