Yu-Hsien Kao
Orcid: 0000-0001-7854-9990
According to our database1,
Yu-Hsien Kao
authored at least 6 papers
between 2010 and 2022.
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Bibliography
2022
A 68-GHz Loss Compensated Distributed Amplifier Using Frequency Interleaved Technique in 65-nm CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2022
2017
18.3 A single-port duplex RF front-end for X-band single-antenna FMCW radar in 65nm CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2015
A Direct-Sampling Pulsed Time-of-Flight Radar With Frequency-Defined Vernier Digital-to-Time Converter in 65 nm CMOS.
IEEE J. Solid State Circuits, 2015
2014
28.3 A frequency-defined vernier digital-to-time converter for impulse radar systems in 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2010
Detection of Cartilage Oligomeric Matrix Protein Using a Quartz Crystal Microbalance.
Sensors, 2010