Yu-Hsiang Kao

According to our database, Yu-Hsiang Kao authored at least 7 papers between 2008 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

An iterative re-weighted least squares processor design for deblurring parabolic camera images.

Yu-Hsiang Kao, Sheng-Jui Huang, Yi-Chang Lu

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

Queue-based segmentation algorithm for refining depth maps in light field camera applications.

Yi-Hsiang Chen, Nae-Chyun Chen, Yu-Hsiang Kao, Yu-Cheng Li, Yi-Chang Lu

Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2014

Design of a Bufferless Photonic Clos Network-on-Chip Architecture.

Yu-Hsiang Kao, H. Jonathan Chao

IEEE Trans. Computers, 2014

2011

CNoC: High-Radix Clos Network-on-Chip.

Yu-Hsiang Kao, Ming Yang, N. Sertac Artan, H. Jonathan Chao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

BLOCON: A Bufferless Photonic Clos network-on-chip architecture.

Yu-Hsiang Kao, H. Jonathan Chao

Proceedings of the NOCS 2011, 2011

2010

Design of High-Radix Clos Network-on-Chip.

Yu-Hsiang Kao, Najla Alfaraj, Ming Yang, H. Jonathan Chao

Proceedings of the NOCS 2010, 2010

2008

Cycle-time-aware sequential way-access set-associative cache for low energy consumption.

Chih-Hui Ting, Juinn-Dar Huang, Yu-Hsiang Kao

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008