Yu Du

Affiliations:

University of Pittsburgh, Department of Computer Science, Pittsburgh, PA, USA

According to our database¹, Yu Du authored at least 17 papers between 2008 and 2016.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2016

Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems.

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[DOI]

ACM Trans. Archit. Code Optim., 2016

2015

Supporting superpages in non-contiguous physical memory.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

Errata to "Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor".

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[DOI]

IEEE Trans. Computers, 2014

2013

Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2013

Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory.

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[DOI]

ACM Trans. Archit. Code Optim., 2013

Bit mapping for balanced PCM cell programming.

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[DOI]

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Writeback-aware bandwidth partitioning for multi-core systems with PCM.

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[DOI]

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012

Writeback-aware partitioning and replacement for last-level caches in phase change main memory systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

2011

A composite and scalable cache coherence protocol for large scale CMPs.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011

2010

Fine-grained QoS scheduling for PCM-based main memory systems.

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[DOI]

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

2009

Variation-tolerant non-uniform 3D cache management in die stacked multicore processor.

[BibT_eX]

[DOI]

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

A low-radix and low-diameter 3D interconnection network design.

[BibT_eX]

[DOI]

Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

Frequent value compression in packet-based NoC architectures.

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[DOI]

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Thermal Management for 3D Processors via Task Scheduling.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Parallel Processing, 2008

Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

Yu Du

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