Yu-Chuan Chen

According to our database, Yu-Chuan Chen authored at least 13 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A job scheduling and rejection problem considering self-contained and cross-functional jobs.

Yu-Chuan Chen, Jen-Ya Wang

RAIRO Oper. Res., 2024

A Lower Bound for Minimizing Waiting Time in Coexisting Virtual and Physical Worlds.

Yu-Chuan Chen, Jen-Ya Wang

IEEE Access, 2024

2023

Machine Learning-Based Outcome Prediction of Acute Ischemic Stroke After Endovascular Treatment.

Yeong-Yuh Xu, Pao-Sheng Yen, Yu-Hui Lin, Chung-Yu Lai, Yu-Chuan Chen, Chuan-Kang Liu

Proceedings of the 8th IEEE/ACIS International Conference on Big Data, 2023

2020

The performance evaluation of banks considering risk: an application of undesirable relation network DEA.

Yu-Chuan Chen, Yung-Ho Chiu, Ching-Jen Chiu

Int. Trans. Oper. Res., 2020

Unsupervised Defect Detection based on Boundary Equilibrium Generative Adversarial Network.

Jau-Ji Shen, Chin-Feng Lee, Yu-Chuan Chen, Somya Agrawal

Proceedings of the ICFET 2020, 2020

2015

Clock-Tree Aware Multibit Flip-Flop Generation During Placement for Power Optimization.

Mark Po-Hung Lin, Chih-Cheng Hsu, Yu-Chuan Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Low-power gated clock tree optimization for three-dimensional integrated circuits.

Yu-Chuan Chen, Chih-Cheng Hsu, Mark Po-Hung Lin

Proceedings of the VLSI Design, Automation and Test, 2015

Earthquake suppression for a scale building model employing inclined inerter.

Chung-Hao Lee, Yu-Chuan Chen, Fu-Cheng Wang

Proceedings of the 2015 IEEE/SICE International Symposium on System Integration, 2015

Earthquake vibration control for buildings with inerter networks.

Yu-Chuan Chen, Jia-Yin Tu, Fu-Cheng Wang

Proceedings of the 14th European Control Conference, 2015

2014

Canonical Forest.

Yu-Chuan Chen, Hyejung Ha, Hyunjoong Kim, Hongshik Ahn

Comput. Stat., 2014

2013

1-D Cell Generation With Printability Enhancement.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, Shu-Hung Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

In-placement clock-tree aware multi-bit flip-flop generation for power optimization.

Chih-Cheng Hsu, Yu-Chuan Chen, Mark Po-Hung Lin

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Lithography-aware 1-dimensional cell generation.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013