Young-Hwan Park
According to our database1,
Young-Hwan Park
authored at least 24 papers
between 2006 and 2021.
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Bibliography
2021
Model updating based on mixed-integer nonlinear programming under model-form uncertainty in finite element model.
Eng. Comput., 2021
2019
Measurement of Mechanical and Thermal Strains by Optical FBG Sensors Embedded in CFRP Rod.
J. Sensors, 2019
2017
Proceedings of the Handbook of Hardware/Software Codesign., 2017
2016
Estimation of Prestress Force Distribution in Multi-Strand System of Prestressed Concrete Structures Using Field Data Measured by Electromagnetic Sensor.
Sensors, 2016
2015
IEEE Trans. Consumer Electron., 2015
Sensors, 2015
Estimation of Prestress Force Distribution in the Multi-Strand System of Prestressed Concrete Structures.
Sensors, 2015
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015
Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015
2014
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014
2013
IEEE Trans. Consumer Electron., 2013
Multiscale Structural Health Monitoring of Cable-Anchorage System Using Piezoelectric PZT Sensors.
Int. J. Distributed Sens. Networks, 2013
Int. J. Distributed Sens. Networks, 2013
Software-defined DVB-T2 receiver using coarse-grained reconfigurable array processors.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
2010
CAPPS: A Framework for Power-Performance Tradeoffs in Bus-Matrix-Based On-Chip Communication Architecture Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2010
2009
System-level PVT variation-aware power exploration of on-chip communication architectures.
ACM Trans. Design Autom. Electr. Syst., 2009
2008
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Methodology for multi-granularity embedded processor power model generation for an ESL design flow.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008
2007
System level power estimation methodology with H.264 decoder prediction IP case study.
Proceedings of the 25th International Conference on Computer Design, 2007
An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories.
Proceedings of the Advances in Computer Systems Architecture, 2007
2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
System-level power-performance trade-offs in bus matrix communication architecture synthesis.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Design and Analysis of Low Power Image Filters Toward Defect-Resilient Embedded Memories for Multimedia SoCs.
Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006