Young-Ho Gong

According to our database, Young-Ho Gong authored at least 20 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory.

Jeongmin Hong, Sungjun Cho, Geonwoo Park, Wonhyuk Yang, Young-Ho Gong, Gwangsun Kim

CoRR, 2024

ZEC ECC: A Zero-Byte Eliminating Compression-Based ECC Scheme for DRAM Reliability.

Ji Hun Kwon, Hyeong Kon Bae, Young Seo Lee, Young-Ho Gong, Sung Woo Chung

IEEE Access, 2024

Sparrow ECC: A Lightweight ECC Approach for HBM Refresh Reduction towards Energy-efficient DNN Inference.

Hoseok Kim, Seung Hun Choi, Joonho Kong, Young-Ho Gong, Sung Woo Chung

Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

Bandwidth-Effective DRAM Cache for GPU s with Storage-Class Memory.

Jeongmin Hong, Sungjun Cho, Geonwoo Park, Wonhyuk Yang, Young-Ho Gong, Gwangsun Kim

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

Scale-CIM: Precision-scalable computing-in-memory for energy-efficient quantized neural networks.

Young Seo Lee, Young-Ho Gong, Sung Woo Chung

J. Syst. Archit., 2023

Twin ECC: A Data Duplication Based ECC for Strong DRAM Error Resilience.

Hyeong Kon Bae, Myung Jae Chung, Young-Ho Gong, Sung Woo Chung

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

Stealth ECC: A Data-Width Aware Adaptive ECC Scheme for DRAM Error Resilience.

Young Seo Lee, Gunjae Koo, Young-Ho Gong, Sung Woo Chung

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Quantifying the Impact of Monolithic 3D (M3D) Integration on L1 Caches.

Young-Ho Gong, Joonho Kong, Sung Woo Chung

IEEE Trans. Emerg. Top. Comput., 2021

Monolithic 3D stacked multiply-accumulate units.

Young Seo Lee, Kyung Min Kim, Ji Heon Lee, Young-Ho Gong, Seon Wook Kim, Sung Woo Chung

Integr., 2021

Quant-PIM: An Energy-Efficient Processing-in-Memory Accelerator for Layerwise Quantized Neural Networks.

Young Seo Lee, Eui-Young Chung, Young-Ho Gong, Sung Woo Chung

IEEE Embed. Syst. Lett., 2021

Characterizing the Thermal Feasibility of Monolithic 3D Microprocessors.

Ji Heon Lee, Young Seo Lee, Jeong Hwan Choi, Hussam Amrouch, Joonho Kong, Young-Ho Gong, Sung Woo Chung

IEEE Access, 2021

Monolithic 3D-Based SRAM/MRAM Hybrid Memory for an Energy-Efficient Unified L2 TLB-Cache Architecture.

Young-Ho Gong

IEEE Access, 2021

2019

Exploring the Relation between Monolithic 3D L1 GPU Cache Capacity and Warp Scheduling Efficiency.

Cong Thuan Do, Young-Ho Gong, Cheol Hong Kim, Seon Wook Kim, Sung Woo Chung

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

2018

Thermal Modeling and Validation of a Real-World Mobile AP.

Young-Ho Gong, Jae Jeong Yoo, Sung Woo Chung

IEEE Des. Test, 2018

2017

Towards refresh-optimized EDRAM-based caches with a selective fine-grain round-robin refresh scheme.

Joonho Kong, Young-Ho Gong, Sung Woo Chung

Microprocess. Microsystems, 2017

An efficient trade-off between yield and energy for eDRAM caches under process variations.

Joonho Kong, Young-Ho Gong

Microprocess. Microsystems, 2017

Architecting large-scale SRAM arrays with monolithic 3D integration.

Joonho Kong, Young-Ho Gong, Sung Woo Chung

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2016

Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh.

Young-Ho Gong, Sung Woo Chung

IEEE Trans. Computers, 2016

Exploration of temperature-aware refresh schemes for 3D stacked eDRAM caches.

Young-Ho Gong, Jae Min Kim, Sung Kyu Lim, Sung Woo Chung

Microprocess. Microsystems, 2016

2013

Performance and cache access time of SRAM-eDRAM hybrid caches considering wire delay.

Young-Ho Gong, Hyung Beom Jang, Sung Woo Chung

Proceedings of the International Symposium on Quality Electronic Design, 2013