Youn Sung Park

According to our database, Youn Sung Park authored at least 10 papers between 2010 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A 1mW Always-on Computer Vision Deep Learning Neural Decision Processor.

David Garrett, Youn Sung Park, Seongjong Kim, Jay Sharma, Wenbin Huang, Majid Shaghaghi, Vinay Parthasarathy, Stephen Gibellini, Stephen Bailey, Mallik Moturi, Pieter Vorenkamp, Kurt Busch, Jeremy Holleman, Behrooz Javid, Alireza Yousefi, Mohsen Judy, Atul Gupta

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2015

A Fully Parallel Nonbinary LDPC Decoder With Fine-Grained Dynamic Clock Gating.

Youn Sung Park, Yaoyu Tao, Zhengya Zhang

IEEE J. Solid State Circuits, 2015

2014

Low-Power High-Throughput LDPC Decoder Using Non-Refresh Embedded DRAM.

Youn Sung Park, David T. Blaauw, Dennis Sylvester, Zhengya Zhang

IEEE J. Solid State Circuits, 2014

A 4.68Gb/s belief propagation polar decoder with bit-splitting register file.

Youn Sung Park, Yaoyu Tao, Shuanghong Sun, Zhengya Zhang

Proceedings of the Symposium on VLSI Circuits, 2014

2013

A Low-Cost Audio Computer for Information Dissemination Among Illiterate People Groups.

Zhiyoong Foo, David Devescery, Mohammad Hassan Ghaed, Inhee Lee, Abishek Madhavan, Youn Sung Park, Aswin S. Rao, Zach Renner, Nathan Roberts, Aaron Schulman, Vikas Vinay, Michael Wieckowski, Dongmin Yoon, Cliff Schmidt, Thomas Schmid, Prabal Dutta, Peter M. Chen, David T. Blaauw

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 1.15Gb/s fully parallel nonbinary LDPC decoder with fine-grained dynamic clock gating.

Youn Sung Park, Yaoyu Tao, Zhengya Zhang

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

A 1.6-mm² 38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM.

Youn Sung Park, David T. Blaauw, Dennis Sylvester, Zhengya Zhang

Proceedings of the Symposium on VLSI Circuits, 2012

High-throughput architecture and implementation of regular (2, dc) nonbinary LDPC decoders.

Yaoyu Tao, Youn Sung Park, Zhengya Zhang

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Reconfigurable architecture and automated design flow for rapid FPGA-based LDPC code emulation.

Haoran Li, Youn Sung Park, Zhengya Zhang

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2010

A case for custom silicon in enabling low-cost information technology for developing regions.

Zhiyoong Foo, David Devescery, Thomas Schmid, Nathan Clark, R. Frank, Mohammad Hassan Ghaed, Ye-Sheng Kuo, Inhee Lee, Youn Sung Park, Zach Renner, Nathaniel Slottow, Vikas Vinay, Michael Wieckowski, Dongmin Yoon, Cliff Schmidt, David T. Blaauw, Peter M. Chen, Prabal Dutta

Proceedings of the First ACM Annual Symposium on Computing for Development, 2010