Youn-Long Lin
Orcid: 0000-0002-4106-8082
According to our database1,
Youn-Long Lin
authored at least 99 papers
between 1988 and 2023.
Collaborative distances:
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Bibliography
2023
NeighborTrack: Single Object Tracking by Bipartite Matching with Neighbor Tracklets and Its Applications to Sports.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
2022
NeighborTrack: Improving Single Object Tracking by Bipartite Matching with Neighbor Tracklets.
CoRR, 2022
HarDNet-DFUS: An Enhanced Harmonically-Connected Network for Diabetic Foot Ulcer Image Segmentation and Colonoscopy Polyp Segmentation.
CoRR, 2022
HarDNet-DFUS: Enhancing Backbone and Decoder of HarDNet-MSEG for Diabetic Foot Ulcer Image Segmentation.
Proceedings of the Diabetic Foot Ulcers Grand Challenge - Third Challenge, 2022
SearchTrack: Multiple Object Tracking with Object-Customized Search and Motion-Aware Features.
Proceedings of the 33rd British Machine Vision Conference 2022, 2022
2021
HarDNet-MSEG: A Simple Encoder-Decoder Polyp Segmentation Neural Network that Achieves over 0.9 Mean Dice and 86 FPS.
CoRR, 2021
Proceedings of the IEEE/CVF International Conference on Computer Vision Workshops, 2021
Proceedings of the Brainlesion: Glioma, Multiple Sclerosis, Stroke and Traumatic Brain Injuries, 2021
2020
CoRR, 2020
2019
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision, 2019
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
IPSJ Trans. Syst. LSI Des. Methodol., 2013
Strengthening Modern Electronics Industry Through the National Program for Intelligent Electronics in Taiwan.
IEEE Access, 2013
2012
IEEE Trans. Multim., 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Three-dimensional integrated circuits implementation of multiple applications emphasising manufacture reuse.
IET Comput. Digit. Tech., 2011
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011
2010
A High-Performance Three-Engine Architecture for H.264/AVC Fractional Motion Estimation.
IEEE Trans. Very Large Scale Integr. Syst., 2010
A Memory-Efficient and Highly Parallel Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC.
IEEE Trans. Very Large Scale Integr. Syst., 2010
An optimal warning-zone-length assignment algorithm for real-time and multiple-QoS on-chip bus arbitration.
ACM Trans. Embed. Comput. Syst., 2010
A high-throughput fully hardwired CABAC encoder for QFHD H.264/AVC main profile video.
IEEE Trans. Consumer Electron., 2010
An elastic software cache with fast prefetching for motion compensation in video decoding.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
IEEE Trans. Consumer Electron., 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2009
A high-performance low-power H.264/AVC video decoder accelerator for embedded systems.
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2009
2008
A motion compensation system with a high efficiency reference frame pre-fetch scheme for QFHD H.264/AVC decoding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
A high-performance and memory-efficient architecture for H.264/AVC motion estimation.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
2007
Proceedings of the IEEE International Conference on Acoustics, 2007
2006
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
Int. J. Embed. Syst., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A hardware accelerator for context-based adaptive binary arithmetic decoding in H.264/AVC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 Design, 2005
2004
Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004
2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002
Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002
2001
Concurrent-simulation-based remote IP evaluation over the internet for system-on-a-chip design.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
A performance-driven standard-cell placer based on a modified force-directed algorithm.
Proceedings of the 2001 International Symposium on Physical Design, 2001
Proceedings of ASP-DAC 2001, 2001
2000
Proceedings of ASP-DAC 2000, 2000
Proceedings of ASP-DAC 2000, 2000
Proceedings of ASP-DAC 2000, 2000
1999
Code generation of nested loops for DSP processors with heterogeneous registers and structural pipelining.
ACM Trans. Design Autom. Electr. Syst., 1999
A timing-driven soft-macro placement and resynthesis method in interaction with chip floorplanning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning.
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
Addressing Optimization for Loop Execution Targeting DSP with Auto-Increment/Decrement Architecture.
Proceedings of the 11th International Symposium on System Synthesis, 1998
Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy.
Proceedings of the 1998 International Symposium on Physical Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
1997
ACM Trans. Design Autom. Electr. Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 International Symposium on Physical Design, 1997
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the conference on European design automation, 1996
1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the 7th International Symposium on High Level Synthesis, 1994
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
1992
IEEE Trans. Computers, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
An Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation.
Proceedings of the 28th Design Automation Conference, 1991
Proceedings of the 28th Design Automation Conference, 1991
1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
A new integer linear programming formulation for the scheduling problem in data path synthesis.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988