Yoshiya Komatsu

According to our database, Yoshiya Komatsu authored at least 5 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

Architecture of an Asynchronous FPGA for Handshake-Component-Based Design.

Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama

IEICE Trans. Inf. Syst., 2013

2011

Implementation of a Low-Power FPGA Based on Synchronous/Asynchronous Hybrid Architecture.

Shota Ishihara, Ryoto Tsuchiya, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama

IEICE Trans. Electron., 2011

An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture.

Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture.

Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama

IEICE Trans. Electron., 2010

2009

An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters.

Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama

Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009