Yoshitaka Yamauchi

Orcid: 0000-0003-0791-4473

According to our database¹, Yoshitaka Yamauchi authored at least 3 papers between 2015 and 2018.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

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PhD thesis

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Bibliography

2018

2/3 and 1/2 Reconfigurable Switched Capacitor DC-DC Converter With 92.9% Efficiency at 62 mW/mm<sup>2</sup> Using Driver Amplitude Doubler.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017

Modeling of 3-level buck converters in discontinuous conduction mode for stand-by mode power supply.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2015

Optimal design to maximize efficiency of single-inductor multiple-output buck converters in discontinuous conduction mode for IoT applications.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Yoshitaka Yamauchi

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