Yoshinori Muramatsu

According to our database, Yoshinori Muramatsu authored at least 6 papers between 1999 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2018

Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs.

Atsushi Nose, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Masatsugu Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Yoshikazu Nitta, Masatoshi Ishikawa

Sensors, 2018

2017

4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing.

Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Masatsugu Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Masatoshi Ishikawa

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2011

A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout.

Takayuki Toyama, Koji Mishina, Koji Tsuchiya, Tatsuya Ichikawa, Hiroyuki Iwaki, Yuji Gendai, Hirotaka Murakami, Kenichi Takamiya, Hiroshi Shiroshita, Yoshinori Muramatsu, Toshihiro Furusawa

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2006

High-Speed Digital Double Sampling with Analog CDS on Column Parallel ADC Architecture for Low-Noise Active Pixel Sensor.

Yoshikazu Nitta, Yoshinori Muramatsu, Kiyotaka Amano, Takayuki Toyama, Jun Yamamoto, Koji Mishina, Atsushi Suzuki, Tadayuki Taura, Akihiko Kato, Masaru Kikuchi, Yukihiro Yasui, Hideo Nomura, Noriyuki Fukushima

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2003

A signal-processing CMOS image sensor using a simple analog operation.

Yoshinori Muramatsu, Susumu Kurosawa, Masayuki Furumiya, Hiroaki Ohkubo, Yasutaka Nakashiba

IEEE J. Solid State Circuits, 2003

1999

Noncomplimentary rewriting and serial-data coding scheme for shared-sense-amplifier open-bit-line DRAM.

Satoshi Utsugi, Masami Hanyu, Yoshinori Muramatsu, Tadahiko Sugibayashi

IEEE J. Solid State Circuits, 1999