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Yoshinori Kusuda

Orcid: 0000-0003-2201-756X

According to our database1, Yoshinori Kusuda authored at least 8 papers between 2010 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
A Fill-In Technique for Robust IMD Suppression in Chopper Amplifiers.
[BibTeX]
[DOI]
Thije Rooijers
,
Shoubhik Karmakar
,
Yoshinori Kusuda
,
Johan H. Huijsing
,
Kofi A. A. Makinwa
IEEE J. Solid State Circuits, 2021

31.4 A Chopper-Stabilized Amplifier with -107dB IMD and 28dB Suppression of Chopper-Induced IMD.
[BibTeX]
[DOI]
Thije Rooijers
,
Shoubhik Karmakar
,
Yoshinori Kusuda
,
Johan H. Huijsing
,
Kofi A. A. Makinwa
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
Techniques of Reducing Switching Artifacts in Chopper Amplifiers.
[BibTeX]
[DOI]
Yoshinori Kusuda
IEICE Trans. Electron., 2020

2016
A 5.6 nV/ √Hz Chopper Operational Amplifier Achieving a 0.5 μV Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique.
[BibTeX]
[DOI]
Yoshinori Kusuda
IEEE J. Solid State Circuits, 2016

2015
A 60 V Auto-Zero and Chopper Operational Amplifier With 800 kHz Interleaved Clocks and Input Bias Current Trimming.
[BibTeX]
[DOI]
Yoshinori Kusuda
IEEE J. Solid State Circuits, 2015

5.1 A 60V auto-zero and chopper operational amplifier with 800kHz interleaved clocks and input bias-current trimming.
[BibTeX]
[DOI]
Yoshinori Kusuda
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2011
A 5.9nV/√Hz chopper operational amplifier with 0.78μV maximum offset and 28.3nV/°C offset drift.
[BibTeX]
[DOI]
Yoshinori Kusuda
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Auto Correction Feedback for Ripple Suppression in a Chopper Amplifier.
[BibTeX]
[DOI]
Yoshinori Kusuda
IEEE J. Solid State Circuits, 2010


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