Yoshinori Ando
According to our database1,
Yoshinori Ando
authored at least 11 papers
between 1990 and 2024.
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Bibliography
2024
Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM.
Proceedings of the IEEE International Memory Workshop, 2024
2023
1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2019
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2018
A 20ns-write 45ns-read and 10<sup>14</sup>-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.
IEEE J. Solid State Circuits, 2017
2016
Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2012
Proceedings of the International Symposium on Micro-NanoMechatronics and Human Science, 2012
2010
Int. J. Autom. Technol., 2010
1990