Yoshinobu Nakagome
According to our database1,
Yoshinobu Nakagome
authored at least 21 papers
between 1988 and 2004.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2011, "For pioneering development of low-voltage dynamic random access memory circuits and low-leakage complementary metal-oxide semiconductor circuits".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2004
2003
1999
IEEE J. Solid State Circuits, 1999
1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
1995
IEEE J. Solid State Circuits, December, 1995
IEEE J. Solid State Circuits, November, 1995
IEEE J. Solid State Circuits, April, 1995
IEEE J. Solid State Circuits, March, 1995
1994
IEEE J. Solid State Circuits, April, 1994
1993
IEEE J. Solid State Circuits, November, 1993
IEEE J. Solid State Circuits, April, 1993
1992
IEEE J. Solid State Circuits, January, 1992
1991
IEEE J. Solid State Circuits, November, 1991
IEEE J. Solid State Circuits, July, 1991
1990
IEEE J. Solid State Circuits, February, 1990
1989
New DRAM noise generation under half-V<sub>cc</sub> precharge and its reduction using a transposed amplifier.
IEEE J. Solid State Circuits, August, 1989
1988
An experimental large-capacity semiconductor file memory using 16-levels/cell storage.
IEEE J. Solid State Circuits, February, 1988